AT49BV163D-70CU Atmel, AT49BV163D-70CU Datasheet - Page 3

• Manufacturer Part Number: AT49BV163D-70CU
• Description: IC FLASH 16MBIT 70NS 48CBGA
• Manufacturer: Atmel

Specifications of AT49BV163D-70CU

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 16M (2M x 8 or 1M x 16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.65 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-CBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3. Block Diagram
4. Device Operation
4.1
4.2
4.3
3590A–FLASH–12/05
Command Sequences
Read
Reset
When the device is first powered on, it will be reset to the read or standby mode, depending
upon the state of the control line inputs. In order to perform other device functions, a series of
command sequences are entered into the device. The command sequences are shown in the
“Command Definition Table” on page 11
codes). The command sequences are written by applying a low pulse on the WE or CE input
with CE or WE low (respectively) and OE high. The address is latched on the falling edge of CE
or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Standard
microprocessor write timings are used. The address locations used in the command sequences
are not affected by entering the command sequences.
The AT49BV163D(T) is accessed like an EPROM. When CE and OE are low and WE is high,
the data stored at the memory location determined by the address pins are asserted on the
out-puts. The outputs are put in the high impedance state whenever CE or OE is high. This dual-
line control gives designers flexibility in preventing bus contention.
A RESET input pin is provided to ease some system applications. When RESET is at a logic
high level, the device is in its standard operating mode. A low level on the RESET input halts the
present device operation and puts the outputs of the device in a high impedance state. When a
high level is reasserted on the RESET pin, the device returns to the read or standby mode,
depending upon the state of the control inputs.
A0 - A19
Y-DECODER
X-DECODER
ADDRESS
BUFFER
INPUT
LATCH
OUTPUT
BUFFER
COMPARATOR
I/O0 - I/O15/A-1
MEMORY
IDENTIFIER
REGISTER
REGISTER
Y-GATING
STATUS
MAIN
DATA
(I/O8 - I/O15 are don’t care inputs for the command
BUFFER
INPUT
WRITE STATE
COMMAND
REGISTER
MACHINE
AT49BV163D(T)
PROGRAM/ERASE
VOLTAGE SWITCH
CE
WE
OE
RESET
BYTE
RDY/BUSY
VCC
GND
3