AT93C57-10SC-2.5 Atmel, AT93C57-10SC-2.5 Datasheet
AT93C57-10SC-2.5
Specifications of AT93C57-10SC-2.5
Related parts for AT93C57-10SC-2.5
AT93C57-10SC-2.5 Summary of contents
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... GND and 128/256/512 words of 8 bits CC (continued) 8-pin PDIP VCC ORG GND 8-lead SOIC VCC ORG GND 8-lead TSSOP VCC ORG GND 3-wire Serial EEPROMs 1K (128 16) 2K (256 128 x 16) 4K (512 256 x 16) AT93C46 AT93C56 AT93C57 AT93C66 Rev. 0172L–10/99 1 ...
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The AT93C46/56/57/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consist- ing of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is ...
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Pin Capacitance Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (DO) OUT C Input Capacitance (CS, SK, DI) IN Note: 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over ...
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AC Characteristics Applicable over recommended operating range from TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter SK Clock f SK Frequency t SK High Time SKH t SK Low Time SKL Minimum CS t ...
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... Instruction Set for the AT93C46 Op Instruction SB Code READ 1 10 EWEN 1 00 ERASE 1 11 WRITE 1 01 ERAL 1 00 WRAL 1 00 EWDS 1 00 Instruction Set for the AT93C57 Op Instruction SB Code READ 1 10 EWEN 1 00 11XXXXXX ERASE 1 11 WRITE 1 01 ERAL 1 00 10XXXXXX WRAL 1 00 01XXXXXX ...
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... DI. The DO pin outputs the READY/BUSY status of the part brought high after being kept low for a minimum of 250 still in progress. A logic “1” indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions ...
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... Synchronous Data Timing Note: 1. This is the minimum SK period. Organization Key for Timing Diagrams AT93C46 (1K) I Note DON’T CARE value, but the extra clock is required DON’T CARE value, but the extra clock is required. 7 READ Timing AT93C56 (2K (1) ( AT93C46/56/57/66 AT93C57 (2K) AT93C66 (4K ...
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EWEN Timing EWDS Timing WRITE Timing HIGH IMPEDANCE DO (1) WRAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V. CC AT93C46/56/57/66 8 ...
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ERASE Timing HIGH IMPEDANCE DO (1) TERAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V ... N-1 N-2 ...
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AT93C46 Ordering Information t (max) I (max) I (max (ms) (µA) (µA) 10 2000 30.0 30.0 10 800 10.0 10.0 8P3 8-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small ...
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AT93C46 Ordering Information (Continued) t (max) I (max) I (max (ms) (µA) (µA) 10 600 10.0 10 0.1 0.1 8P3 8-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing ...
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AT93C56 Ordering Information t (max) I (max) I (max (ms) (µA) (µA) 10 2000 30.0 30.0 10 800 10.0 10.0 10 600 10.0 10.0 8P3 8-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, ...
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... AT93C57 Ordering Information t (max) I (max) I (max (ms) (µA) (µA) 10 2000 30.0 30.0 10 800 10.0 10.0 8P3 8-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8-lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Blank Standard Operation (4 ...
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AT93C66 Ordering Information t (max) I (max) I (max (ms) (µA) (µA) 10 2000 30.0 30.0 10 800 10.0 10.0 10 600 10.0 10.0 8P3 8-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, ...
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Packaging Information 8P3, 8-pin, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 BA .400 (10.16) .355 (9.02) PIN 1 .300 (7.62) REF .210 (5.33) MAX .100 (2.54) BSC SEATING PLANE .150 (3.81) .115 ...
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... No licenses to patents or other intellectual prop- erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. ...