AT49BV4096A-90TI Atmel, AT49BV4096A-90TI Datasheet - Page 5
![IC FLASH 4MBIT 90NS 48TSOP](/photos/7/21/72193/313-48-tsop_sml.jpg)
AT49BV4096A-90TI
Manufacturer Part Number
AT49BV4096A-90TI
Description
IC FLASH 4MBIT 90NS 48TSOP
Manufacturer
Atmel
Datasheet
1.AT49BV4096A-70TI.pdf
(16 pages)
Specifications of AT49BV4096A-90TI
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8 or 256K x 16)
Speed
90ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT49BV4096A-90TI
Manufacturer:
ATMEL
Quantity:
114
Part Number:
AT49BV4096A-90TI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
AT49BV/LV4096A
cannot be programmed. The software product identification exit code should be used to
return to standard operation.
BOOT BLOCK PROGRAMMING LOCKOUT OVERRIDE: The user can override the
boot block programming lockout by taking the RESET pin to 12 volts during the entire
chip erase, sector erase or word programming operation. When the RESET pin is
brought back to TTL levels, the boot block programming lockout feature is again active.
PRODUCT IDENTIFICATION: The product identification mode identifies the device and
manufacturer as Atmel. It may be accessed by hardware or software operation. The
hardware operation mode can be used by an external programmer to identify the correct
programming algorithm for the Atmel product.
For details, see “Operating Modes” (for hardware operation) or “Software Product Identi-
fication Entry/Exit” on page 12. The manufacturer and device codes are the same for
both modes.
DATA POLLING: The AT49BV/LV4096A features Data Polling to indicate the end of a
program cycle. During a program cycle an attempted read of the last byte loaded will
result in the complement of the loaded data on I/O7. Once the program cycle has been
completed, true data is valid on all outputs and the next cycle may begin. During a chip
or sector erase operation, an attempt to read the device will give a “0” on I/O7. Once the
program or erase cycle has completed, true data will be read from the device. Data Poll-
ing may begin at any time during the program cycle.
TOGGLE BIT: In addition to Data Polling, the AT49BV/LV4096A provides another
method for determining the end of a program or erase cycle. During a program or erase
operation, successive attempts to read data from the device will result in I/O6 toggling
between one and zero. Once the program cycle has completed, I/O6 will stop toggling
and valid data will be read. Examining the toggle bit may begin at any time during a pro-
gram cycle.
HARDWARE DATA PROTECTION: Hardware features protect against inadvertent pro-
grams to the AT49BV/LV4096A in the following ways: (a) V
sense: if V
is below
CC
CC
1.8V (typical), the program function is inhibited. (b) V
power on delay: once V
has
CC
CC
reached the V
sense level, the device will automatically time out 10 ms (typical)
CC
before programming. (c) Program inhibit: holding any one of OE low, CE high or WE
high inhibits program cycles. (d) Noise filter: pulses of less than 15 ns (typical) on the
WE or CE inputs will not initiate a program cycle.
INPUT LEVELS: While operating with a 2.7V to 3.6V power supply, the address and
control inputs (OE, CE and WE) may be driven from 0 to 5.5V without adversely affect-
ing the operation of the device. The I/O lines can only be driven from 0 to V
+ 0.6V.
CC
5
1618H–FLASH–4/04