AT45DB011B-CI Atmel, AT45DB011B-CI Datasheet - Page 7
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AT45DB011B-CI
Manufacturer Part Number
AT45DB011B-CI
Description
IC FLASH 1MBIT 20MHZ 9CBGA
Manufacturer
Atmel
Datasheet
1.AT45DB011B-SC.pdf
(32 pages)
Specifications of AT45DB011B-CI
Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
1M (512 pages x 264 bytes)
Speed
20MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
9-CBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Additional
Commands
1984J–DFLASH–06/06
MAIN MEMORY PAGE PROGRAM THROUGH BUFFER: This operation is a combination of
the Buffer Write and Buffer to Main Memory Page Program with Built-in Erase operations.
Data is first shifted into the buffer from the SI pin and then programmed into a specified page
in the main memory. An 8-bit opcode of 82H is followed by the six reserved bits and 18
address bits. The nine most significant address bits (PA8-PA0) select the page in the main
memory where data is to be written, and the next nine address bits (BFA8-BFA0) select the
first byte in the buffer to be written. After all address bits are shifted in, the part will take data
from the SI pin and store it in the data buffer. If the end of the buffer is reached, the device will
wrap around back to the beginning of the buffer. When there is a low-to-high transition on the
CS pin, the part will first erase the selected page in main memory to all 1s and then program
the data stored in the buffer into the specified page in the main memory. Both the erase and
the programming of the page are internally self timed and should take place in a maximum of
time t
MAIN MEMORY PAGE TO BUFFER TRANSFER: A page of data can be transferred from the
main memory to buffer. An 8-bit opcode of 53H is followed by the six reserved bits, nine
address bits (PA8-PA0) which specify the page in main memory that is to be transferred, and
nine don’t care bits. The CS pin must be low while toggling the SCK pin to load the opcode,
the address bits, and the don’t care bits from the SI pin. The transfer of the page of data from
the main memory to the buffer will begin when the CS pin transitions from a low to a high state.
During the transfer of a page of data (t
whether the transfer has been completed or not.
MAIN MEMORY PAGE TO BUFFER COMPARE: A page of data in main memory can be com-
pared to the data in the buffer. An 8-bit opcode of 60H is followed by 24 address bits
consisting of the six reserved bits, nine address bits (PA8-PA0) which specify the page in the
main memory that is to be compared to the buffer, and nine don’t care bits. The loading of the
opcode and the address bits is the same as described previously. The CS pin must be low
while toggling the SCK pin to load the opcode, the address bits, and the don’t care bits from
the SI pin. On the low-to-high transition of the CS pin, the 264 bytes in the selected main mem-
ory page will be compared with the 264 bytes in the buffer. During this time (t
register will indicate that the part is busy. On completion of the compare operation, bit 6 of the
status register is updated with the result of the compare.
AUTO PAGE REWRITE: This mode is only needed if multiple bytes within a page or multiple
pages of data are modified in a random fashion. This mode is a combination of two operations:
Main Memory Page to Buffer Transfer and Buffer to Main Memory Page Program with Built-in
Erase. A page of data is first transferred from the main memory to the data buffer, and then the
same data (from the buffer) is programmed back into its original page of main memory. An 8-
bit opcode of 58H is followed by the six reserved bits, nine address bits (PA8-PA0) that spec-
ify the page in main memory to be rewritten, and nine additional don’t care bits. When a low-
to-high transition occurs on the CS pin, the part will first transfer data from the page in main
memory to the buffer and then program the data from the buffer back into same page of main
memory. The operation is internally self-timed and should take place in a maximum time of t
During this time, the status register will indicate that the part is busy.
If a sector is programmed or reprogrammed sequentially page by page, then the programming
algorithm shown in Figure 1 on page 26 is recommended. Otherwise, if multiple bytes in a
page or several pages are programmed randomly in a sector, then the programming algorithm
shown in Figure 2 on page 27 is recommended. Each page within a sector must be
updated/rewritten at least once within every 10,000 cumulative page erase/program opera-
tions in that sector.
EP
. During this time, the status register will indicate that the part is busy.
XFR
), the status register can be read to determine
AT45DB011B
XFR
), the status
EP
7
.