AT24C16AN-10SI-2.7 Atmel, AT24C16AN-10SI-2.7 Datasheet - Page 6

IC EEPROM 16KBIT 400KHZ 8SOIC

AT24C16AN-10SI-2.7

Manufacturer Part Number
AT24C16AN-10SI-2.7
Description
IC EEPROM 16KBIT 400KHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT24C16AN-10SI-2.7

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
16K (2K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT24C16AN-10SI2.7

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT24C16AN-10SI-2.7
Manufacturer:
ATMEL
Quantity:
438
Part Number:
AT24C16AN-10SI-2.7
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-
nal device. Data on the SDA pin may change only during SCL low time periods (refer to
Data Validity timing diagram). Data changes during SCL high periods will indicate a start
or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition
which must precede any other command (refer to Start and Stop Definition timing
diagram).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.
After a read sequence, the stop command will place the EEPROM in a standby power
mode (refer to Start and Stop Definition timing diagram).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from
.
the EEPROM in 8 bit words
The EEPROM sends a zero to acknowledge that it has
received each word. This happens during the ninth clock cycle.
STANDBY MODE: The AT24C02A/04A/08A/16A features a low power standby mode
which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the
completion of any internal operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any
2-wire part can be reset by following these steps: (a) Clock up to 9 cycles, (b) look for
SDA high in each cycle while SCL is high and then (c) create a start condition as SDA is
high.
AT24C02A/04A/08A/16A
6
0976M–SEEPR–7/04

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