AT29C256-20PI Atmel, AT29C256-20PI Datasheet - Page 4

• Manufacturer Part Number: AT29C256-20PI
• Description: IC FLASH 256KBIT 200NS 28DIP
• Manufacturer: Atmel

Specifications of AT29C256-20PI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 256K (32K x 8)
• Speed: 200ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: AT29C25620PI

4.4
4.5
4.6
4.7
4.8
4
Software Data Protection
Hardware Data Protection
Product Identification
Data Polling
Toggle Bit
AT29C256
A software controlled data protection feature is available on the AT29C256. Once the software
protection is enabled a software algorithm must be issued to the device before a program may
be performed. The software protection feature may be enabled or disabled by the user; when
shipped from Atmel
data protection, a series of three program commands to specific addresses with specific data
must be performed. After the software data protection is enabled the same three program com-
mands must begin each program cycle in order for the programs to occur. All software program
commands must obey the page program timing specifications. Once set, the software data pro-
tection feature remains active unless its disable command is issued. Power transitions will not
reset the software data protection feature; however, the software feature will guard against inad-
vertent program cycles during power transitions.
Once set, software data protection will remain active unless the disable command sequence is
issued.
After setting SDP, any attempt to write to the device without the three-byte command sequence
will start the internal write timers. No data will be written to the device; however, for the duration
of t
After the software data protection’s three-byte command code is given, a byte load is performed
by applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE high.
The address is latched on the falling edge of CE or WE, whichever occurs last. The data is
latched by the first rising edge of CE or WE. The 64 bytes of data must be loaded into each sec-
tor by the same procedure as outlined in the program section under device operation.
Hardware features protect against inadvertent programs to the AT29C256 in the following ways:
(a) V
delay – once V
(typical) before programming; (c) Program inhibit – holding any one of OE low, CE high or WE
high inhibits program cycles; and (d) Noise filter – pulses of less than 15 ns (typical) on the WE
or CE inputs will not initiate a program cycle.
The product identification mode identifies the device and manufacturer and may be accessed by
a hardware operation. For details, see Operating Modes or Product Identification.
The AT29C256 features DATA polling to indicate the end of a program cycle. During a program
cycle an attempted read of the last byte loaded will result in the complement of the loaded data
on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the
next cycle may begin. DATA polling may begin at any time during the program cycle.
In addition to DATA polling the AT29C256 provides another method for determining the end of a
program or erase cycle. During a program or erase operation, successive attempts to read data
from the device will result in I/O6 toggling between one and zero. Once the program cycle has
completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may begin
at any time during a program cycle.
WC
CC
, a read operation will effectively be a polling operation.
sense – if V
CC
has reached the V
CC
®
, the software data protection feature is disabled. To enable the software
is below 3.8V (typical), the program function is inhibited; (b) V
CC
sense level, the device will automatically time out 5 ms
0046S–FLASH–2/07
CC
power on