AT27BV256-70TC Atmel, AT27BV256-70TC Datasheet - Page 3
![IC OTP 256KBIT 70NS 28TSOP](/photos/7/21/72191/313-28-tsop_sml.jpg)
AT27BV256-70TC
Manufacturer Part Number
AT27BV256-70TC
Description
IC OTP 256KBIT 70NS 28TSOP
Manufacturer
Atmel
Datasheet
1.AT27BV256-70TU.pdf
(15 pages)
Specifications of AT27BV256-70TC
Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
256K (32K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V, 4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT27BV25670TC
3. System Considerations
4. Block Diagram
5. Absolute Maximum Ratings*
Note:
0601E–EPROM–12/07
Temperature Under Bias.................................. -40°C to +85°C
Storage Temperature ..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground ........................................ -2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
V
Respect to Ground .......................................-2.0V to +14.0V
PP
Supply Voltage with
1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
overshoot to +7.0V for pulses of less than 20 ns.
CC
+ 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
Switching between active and standby conditions via the Chip Enable pin may produce tran-
sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
CC
(1)
(1)
(1)
and Ground terminals. This capacitor should be positioned as
*NOTICE:
CC
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
and Ground terminals of the device, as close
AT27BV256
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