AT28BV256-20JI Atmel, AT28BV256-20JI Datasheet - Page 5
![IC EEPROM 256KBIT 200NS 32PLCC](/photos/7/21/72190/453-32-plcc_sml.jpg)
AT28BV256-20JI
Manufacturer Part Number
AT28BV256-20JI
Description
IC EEPROM 256KBIT 200NS 32PLCC
Manufacturer
Atmel
Datasheet
1.AT28BV256-20SU.pdf
(17 pages)
Specifications of AT28BV256-20JI
Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
256K (32K x 8)
Speed
200ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT28BV256-20JI
Manufacturer:
ATMEL
Quantity:
5 510
Company:
Part Number:
AT28BV256-20JI
Manufacturer:
MITSUBISHI
Quantity:
5 510
5.6.1
5.6.2
5.7
0273K–PEEPR–2/09
Device Identification
Hardware Protection
Software Data Protection
Hardware features protect against inadvertent writes to the AT28BV256 in the following ways:
(a) V
out 10 ms (typical) before allowing a write; (b) write inhibit – holding any one of OE low, CE high
or WE high inhibits write cycles; and (c) noise filter – pulses of less than 15 ns (typical) on the
WE or CE inputs will not initiate a write cycle.
A software-controlled data protection feature has been implemented on the AT28BV256. Soft-
ware data protection (SDP) helps prevent inadvertent writes from corrupting the data in the
device. SDP can prevent inadvertent writes during power-up and power-down as well as any
other potential periods of system instability.
The AT28BV256 can only be written using the software data protection feature. A series of three
write commands to specific addresses with specific data must be presented to the device before
writing in the byte or page mode. The same three write commands must begin each write opera-
tion. All software write commands must obey the page mode write timing specifications. The
data in the 3-byte command sequence is not written to the device; the address in the command
sequence can be utilized just like any other location in the device.
Any attempt to write to the device without the 3-byte sequence will start the internal write timers.
No data will be written to the device; however, for the duration of t
tively be polling operations.
An extra 64 bytes of EEPROM memory are available to the user for device identification. By rais-
ing A9 to 12V ± 0.5V and using address locations 7FC0H to 7FFFH the additional bytes may be
written to or read from in the same manner as the regular memory array.
CC
power-on delay – once V
CC
has reached 1.8V (typical) the device will automatically time
WC
, read operations will effec-
AT28BV256
5