MT47H128M4B6-3:D TR Micron Technology Inc, MT47H128M4B6-3:D TR Datasheet - Page 111
![IC DDR2 SDRAM 512MBIT 3NS 60FBGA](/photos/7/23/72317/mfg557-60-fbga_sml.jpg)
MT47H128M4B6-3:D TR
Manufacturer Part Number
MT47H128M4B6-3:D TR
Description
IC DDR2 SDRAM 512MBIT 3NS 60FBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H128M4BT-37EA_TR.pdf
(129 pages)
Specifications of MT47H128M4B6-3:D TR
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
512M (128Mx4)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
60-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1291-2
MT47H128M4B6-3:D TR
MT47H128M4B6-3:D TR
- Current page: 111 of 129
- Download datasheet (10Mb)
SELF REFRESH
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. O 7/09 EN
The SELF REFRESH command is initiated when CKE is LOW. The differential clock
should remain stable and meet
refresh mode. The procedure for exiting self refresh requires a sequence of commands.
First, the differential clock must be stable and meet
prior to CKE going back to HIGH. Once CKE is HIGH (
with three clock registrations), the DDR2 SDRAM must have NOP or DESELECT com-
mands issued for
ments is used to apply NOP or DESELECT commands for 200 clock cycles before
applying any other command.
t
XSNR. A simple algorithm for meeting both refresh and DLL require-
111
t
CKE specifications at least 1 ×
Micron Technology, Inc. reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR2 SDRAM
t
CK specifications at least 1 ×
t
CKE [MIN] has been satisfied
©2004 Micron Technology, Inc. All rights reserved.
t
CK after entering self
SELF REFRESH
t
CK
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