CAT25040LI-G ON Semiconductor, CAT25040LI-G Datasheet - Page 6

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CAT25040LI-G

Manufacturer Part Number
CAT25040LI-G
Description
IC EEPROM 4KBIT 10MHZ 8DIP
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT25040LI-G

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
4K (512 x 8)
Speed
10MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Organization
512 x 8
Interface Type
SPI
Maximum Clock Frequency
5 MHz
Access Time
75 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
25040LI-G

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT25040LI-G
Manufacturer:
ON
Quantity:
11 400
Byte Write
sequence, by sending a WRITE instruction, a 8−bit address
and data as shown in Figure 5. For the CAT25040, bit 3 of
the write instruction opcode contains A8 address bit.
Internal programming will start after the low to high CS
transition. During an internal write cycle, all commands,
except for RDSR (Read Status Register) will be ignored.
The RDY bit will indicate if the internal write cycle is in
progress (RDY high), or the device is ready to accept
commands (RDY low).
Once the WEL bit is set, the user may execute a write
SCK
SCK
SO
CS
SO
CS
SI
SI
Dashed Line = mode (1, 1)
* X = 0 for CAT25010, CAT25020. x = A8 for CAT25040
Dashed Line = mode (1, 1)
* X = 0 for CAT25010, CAT25020. x = A8 for CAT25040
0
0
0
0
0
0
1
1
0
0
2
HIGH IMPEDANCE
2
0
0
3
3
OPCODE
OPCODE
X*
X*
4
4
0
0
5
5
1
1
6
6
0
0
Figure 6. Page WRITE Timing
Figure 5. Byte WRITE Timing
7
7
A
A
7
8
7
8
BYTEADDRESS
http://onsemi.com
BYTE ADDRESS
HIGH IMPEDANCE
13 14 15 16 17 18 19
13 14 15 16−23 24−31
6
Page Write
the host may continue sending data, up to a total of 16 bytes,
according to timing shown in Figure 6. After each data byte,
the lower order address bits are automatically incremented,
while the higher order address bits (page address) remain
unchanged. If during this process the end of page is
exceeded, then loading will “roll over” to the first byte in the
page, thus possibly overwriting previously loaded data.
Following
CAT25010/20/40 is automatically returned to the write
disable state.
A
A
After sending the first data byte to the CAT25010/20/40,
0
0
Byte 1
D7 D6 D5 D4 D3 D2 D1 D0
Data
Byte 2
Data
DATA IN
completion
Byte 3
DATA IN
16+(N−1)x8−1..16+(N−1)x8
Data
20
Data Byte N
of
7..1
21
22 23
the
0
write
16+Nx8−1
cycle,
the

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