CY7C008-15AXC Cypress Semiconductor Corp, CY7C008-15AXC Datasheet - Page 7

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CY7C008-15AXC

Manufacturer Part Number
CY7C008-15AXC
Description
IC SRAM 512KBIT 15NS 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C008-15AXC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
512K (64K x 8)
Speed
15ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C008-15AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-06041 Rev. *D
Switching Characteristics
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Notes:
13. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
14. To access RAM, CE = L, SEM = H. To access semaphore, CE = H and SEM = L. Either condition must be valid for the entire t
15. At any given temperature and voltage condition for any given device, t
16. Test conditions used are Load 2.
17. This parameter is guaranteed by design, but it is not production tested.
18. For information on port-to-port delay through RAM cells from writing port to reading port, refer to Read Timing with Busy waveform.
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
ABE
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
WDD
DDD
READ CYCLE
WRITE CYCLE
Parameter
[14]
I
[17]
[17]
OI
[14]
[14]
[14]
[18]
[18]
/I
[15, 16, 17]
[15, 16, 17]
[15, 16, 17]
[13, 16, 17]
[16, 17]
[16, 17]
OH
and 30-pF load capacitance.
Read Cycle Time
Address to Data Valid
Output Hold From Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable Access Time
Write Cycle Time
CE LOW to Write End
Address Valid to Write End
Address Hold From Write End
Address Set-Up to Write Start
Write Pulse Width
Data Set-Up to Write End
Data Hold From Write End
R/W LOW to High Z
R/W HIGH to Low Z
Write Pulse to Data Delay
Write Data Valid to Read Data Valid
Description
Over the Operating Range
HZCE
[13]
is less than t
Min.
12
12
10
10
10
10
3
3
3
0
0
0
0
3
-12
[1]
LZCE
Max.
12
12
10
10
12
12
10
25
20
8
and t
HZOE
CY7C008/009
CY7C018/019
Min.
15
15
12
12
12
10
3
3
3
0
0
0
0
3
is less than t
-15
Max.
15
15
10
10
10
15
15
10
30
25
LZOE
.
Min.
SCE
20
20
15
15
15
15
3
3
3
0
0
0
0
3
CY7C008/009
CY7C018/019
time.
-20
Max.
20
20
12
12
12
20
20
12
45
30
Page 7 of 19
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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