CY14B256L-SZ35XC Cypress Semiconductor Corp, CY14B256L-SZ35XC Datasheet - Page 12

• Manufacturer Part Number: CY14B256L-SZ35XC
• Description: IC NVSRAM 256KBIT 35NS 32SOIC
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of CY14B256L-SZ35XC

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 256K (32K x 8)
• Speed: 35ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-SOIC (7.5mm Width)
• Word Size: 8b
• Organization: 32Kx8
• Density: 256Kb
• Interface Type: Parallel
• Access Time (max): 35ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: SOIC
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Pin Count: 32
• Mounting: Surface Mount
• Supply Current: 55mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2032-5; CY14B256L-SZ35XC

Note
Document Number: 001-54707 Rev. *F
17. WE must be HIGH during SRAM read cycles.
18. HSB must remain HIGH during READ and WRITE cycles.
19. If WE is low when CE goes low, the outputs remain in the high impedance state.
20. CE or WE must be > V
Data Output
Data Output
Data Input
Address
Data Output
Data Input
Address
Address
WE
CE
CE
OE
I
IH
CC
WE
CE
during address transitions.
High Impedance
Figure 6. SRAM Read Cycle #2: CE and OE Controlled
Standby
Figure 7. SRAM Write Cycle #1: WE Controlled
Figure 8. SRAM Write Cycle #2: CE Controlled
Previous Data
t
SA
t
t
SA
PU
t
LZCE
t
LZOE
t
Address Valid
AA
High Impedance
t
t
ACE
AW
t
Address Valid
t
PWE
t
SCE
HZWE
Address Valid
t
t
SCE
DOE
t
t
PWE
RC
t
Active
WC
Input Data Valid
t
WC
t
SD
t
High Impedance
SD
Input Data Valid
Output Data Valid
t
LZWE
[18, 19, 20]
[18, 19, 20]
t
t
HD
HD
t
HA
t
HA
[17, 18]
t
t
HZCE
HZOE
t
PD
CY14B256LA
Page 12 of 22
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