CY7C136-55JC Cypress Semiconductor Corp, CY7C136-55JC Datasheet - Page 8

• Manufacturer Part Number: CY7C136-55JC
• Description: IC SRAM 2KX8 ASYNC DUAL 52-PLCC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C136-55JC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 16K (2K x 8)
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 52-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1199

Document #: 38-06031 Rev. *A
Switching Waveforms
Write Cycle No.1 (OE Three-States Data I/Os—Either Port)
Write Cycle No. 2 (R/W Three-States Data I/Os—Either Port)
Notes:
22. If OE is LOW during a R/W controlled write cycle, the write pulse width must be the larger of t
23. If the CE LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in a high-impedance state.
ADDRESS
ADDRESS
DATA
DATA
to be placed on the bus for the required t
D
D
R/W
OUT
R/W
OUT
OE
CE
CE
IN
IN
t
HZOE
(continued)
t
SD
SA
t
SA
.
t
SCE
t
SCE
t
AW
t
AW
t
HZWE
t
WC
t
WC
[14, 22]
[14, 23]
t
HIGH IMPEDANCE
PWE
PWE
t
PWE
DATA VALID
t
SD
or t
HZWE
HIGH IMPEDANCE
+ t
t
SD
DATA VALID
SD
to allow the data I/O pins to enter high impedance and for data
t
HD
t
HD
t
LZWE
t
t
HA
CY7C132/CY7C136
CY7C142/CY7C146
HA
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