M29W128GL70N6E NUMONYX, M29W128GL70N6E Datasheet - Page 92

IC FLASH 128MBIT 70NS 56TSOP

M29W128GL70N6E

Manufacturer Part Number
M29W128GL70N6E
Description
IC FLASH 128MBIT 70NS 56TSOP
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of M29W128GL70N6E

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16Mx8, 8Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSOP
Package
56TSOP
Cell Type
NOR
Density
128 Mb
Architecture
Sectored
Block Organization
Symmetrical
Typical Operating Supply Voltage
3|3.3 V
Sector Size
128KByte x 128
Timing Type
Asynchronous
Interface Type
Parallel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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12
Table 43.
92/94
24-Nov-2006
30-Mar-2007
28-Jan-2008
20-Mar-2008
23-Oct-2007
21-Apr-2008
Date
Revision history
Document revision history
Version
0.1
1
2
3
4
5
Initial release.
V
maximum
Chip program time without V
RP signal acting as a reset input, unprotection of all the blocks previously protected
using a high voltage block protection technique removed.
Table 4: Bus operations, 8-bit mode
updated.
method (8-bit mode)
programmer method (16-bit mode)
mode - programmer method (8-bit mode)
mode - programmer method (16-bit mode)
Section 5: Software protection
Unlock Bypass Block Erase, Unlock Bypass Chip Erase, and Unlock Write to Buffer
and Program commands added.
Lock register description added in
Enhanced Buffered Program commands added (see on page1 and from
Section 6.2.2
Modified values for page access, random access, programming time, and chip
program time on page 1. Speed classes changed in
Table
Table 14: Enhanced buffered program commands, 16-bit mode
Table
Table 40
Figure 31: Enhanced buffered program flowchart and pseudocode
Appendix
Document status promoted from preliminary data to datasheet.
Speed classes and page size modified on page 1.
Modified:
Section 6.1.5: Block Erase
Operating and AC measurement
Table 40: Primary algorithm-specific extended query
Added:
Changed erase suspend latency time in
program, erase endurance
Minor text changes.
Applied Numonyx branding.
Modified:
Table 23: Power-up waiting
query
Added t
Reset AC waveforms (no program/erase
program/erase operation AC
Minor text changes.
IO
changed to V
30, and
12,
table, and
Table 23: Power-up waiting timings
PHWL
updated as well as
Table 6: Read electronic signature - auto select mode - programmer
Table 4: Bus operations, 8-bit
Table
Section 2.8: VPP/write protect
D.
ratings.
and t
to
Table
13,
Section
Figure 12: Power-up waiting
CCQ
RHWL
Table
34.
and
in the whole document and added in
6.2.12).
timings in
Table 7: Read electronic signature - auto select mode -
15,
command,
cycles.
timings,
PPH
Figure
waveforms.
Table
added, together with the related commands.
updated in Features section.
conditions,
Section
Table 29: Reset AC
updated.
16,
23.
and
Table 40: Primary algorithm-specific extended
Changes
Table 3: VPP/WP
Table
mode,
(VPP/WP),
Table 17: Program, erase times and
Table 5: Bus operations, 16-bit mode
ongoing), and
and
7.1.
updated.
and
Table 8: Block protection - auto select
Table 25: DC
17,
timings.
Table 9: Block protection - auto select
Table 5: Bus operations, 16-bit
Figure 12: Power-up waiting
Table
Section 3.6: Automatic
Table
table.
characteristics,
22,
Figure 23: Reset during
functions,
27,
characteristics, and
Table 21: Absolute
Table
Table
added.
26,
added in
Table 22:
28,
Table
Figure 22:
Table
standby,
38, and
timings.
mode,
29,

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