M29DW323DT70N6E NUMONYX, M29DW323DT70N6E Datasheet - Page 44

• Manufacturer Part Number: M29DW323DT70N6E
• Description: IC FLASH 32MBIT 70NS 48TSOP
• Manufacturer: NUMONYX
• Series: Axcell™r

Specifications of M29DW323DT70N6E

• Format - Memory: FLASH
• Memory Type: FLASH - Nor
• Memory Size: 32M (4Mx8, 2Mx16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 48
• Access Time: 70ns
• Base Number: 29
• Ic Generic Number: 29DW323
• Memory Configuration: 4M X 8, 2M X 16
• Interface Type: CFI, Parallel
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M29DW323DT, M29DW323DB
APPENDIX D. BLOCK PROTECTION
Block protection can be used to prevent any oper-
ation from modifying the data stored in the memo-
ry. The blocks are protected in groups, refer to
APPENDIX
Protection Groups. Once protected, Program and
Erase operations within the protected group fail to
change the data.
There are three techniques that can be used to
control Block Protection, these are the Program-
mer technique, the In-System technique and Tem-
porary Unprotection. Temporary Unprotection is
controlled by the Reset/Block Temporary Unpro-
tection pin, RP; this is described in the Signal De-
scriptions section.
Programmer Technique
The Programmer technique uses high (V
age levels on some of the bus pins. These cannot
be achieved using a standard microprocessor bus,
therefore the technique is recommended only for
use in Programming Equipment.
To protect a group of blocks follow the flowchart in
Figure 20., Programmer Equipment Group Protect
Flowchart. To unprotect the whole chip it is neces-
sary to protect all of the groups first, then all
groups can be unprotected at the same time. To
unprotect the chip follow
Equipment Chip Unprotect
32., Programmer Technique Bus Operations,
BYTE = VIH or
eration.
The timing on these flowcharts is critical. Care
should be taken to ensure that, where a pause is
Table 32. Programmer Technique Bus Operations, BYTE = V
Note: 1. Block Protection Groups are shown in
44/51
Block (Group)
Protect
Chip Unprotect
Block (Group)
Protection Verify
Block (Group)
Unprotection Verify
Operation
(1)
A., Tables
VIL, gives a summary of each op-
V
V
V
V
E
23
ID
IL
IL
IL
Figure 21., Programmer
and
V
V
V
V
G
ID
ID
IL
IL
24
Flowchart.
V
V
for details of the
IL
IL
V
V
W
APPENDIX
Pulse
Pulse
IH
IH
ID
A0 = V
A0 = V
) volt-
Table
A9 = V
A., Tables
A9 = V
IL
IL
A12-A20 Block Address
A12-A20 Block Address
, A1 = V
, A1 = V
ID
ID
Address Inputs
, A12-A20 Block Address
23
, A12 = V
specified, it is followed as closely as possible. Do
not abort the procedure before reaching the end.
Chip Unprotect can take several seconds and a
user message should be provided to show that the
operation is progressing.
In-System Technique
The In-System technique requires a high voltage
level on the Reset/Blocks Temporary Unprotect
pin, RP
the maximum ratings of the components on the mi-
croprocessor bus, therefore this technique is suit-
able for use after the memory has been fitted to
the system.
To protect a group of blocks follow the flowchart in
Figure 22., In-System Equipment Group Protect
Flowchart. To unprotect the whole chip it is neces-
sary to protect all of the groups first, then all the
groups can be unprotected at the same time. To
unprotect the chip follow
Equipment Chip Unprotect
The timing on these flowcharts is critical. Care
should be taken to ensure that, where a pause is
specified, it is followed as closely as possible. Do
not allow the microprocessor to service interrupts
that will upset the timing and do not abort the pro-
cedure before reaching the end. Chip Unprotect
can take several seconds and a user message
should be provided to show that the operation is
progressing.
Note: 1. RP can be either at V
Others = X
Others = X
Others = X
Others = X
and 24.
A0-A20
IH
IH
, A6 = V
, A6 = V
tem Technique to protect the Extended Block.
(1)
IH
, A15 = V
. This can be achieved without violating
IH
IH
IL
or V
, A9 = V
, A9 = V
IL
IH
ID
ID
,
,
IH
or at V
DQ15A–1, DQ14-DQ0
Data Inputs/Outputs
Flowchart.
Figure 23., In-System
Retry = XX00h
Retry = XX01h
Pass = XX01h
Pass = XX00h
ID
when using the In-Sys-
X
X