M27C4001-10C1 STMicroelectronics, M27C4001-10C1 Datasheet - Page 9

IC OTP 4MBIT 100NS 32PLCC

M27C4001-10C1

Manufacturer Part Number
M27C4001-10C1
Description
IC OTP 4MBIT 100NS 32PLCC
Manufacturer
STMicroelectronics
Datasheets

Specifications of M27C4001-10C1

Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
4M (512K x 8)
Speed
100ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
32-PLCC
Memory Configuration
512K X 8
Access Time
100ns
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
PLCC
No. Of Pins
32
Rohs Compliant
Yes
Density
4Mb
Organization
512Kx8
Interface Type
Parallel
Bus Type
Parallel
In System Programmable
External
Access Time (max)
100ns
Package Type
PLCC
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
50mA
Pin Count
32
Mounting
Surface Mount
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Frequency (max)
Not RequiredMHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
M27C4001
2.4
2.5
2.6
System Considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, I
the system designer: the standby current level, the active current level, and transient current
peaks that are produced by the falling and rising edges of E. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device at the
output. The associated transient voltage peaks can be suppressed by complying with the
two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1 F ceramic capacitor be used on every device between V
be a high frequency capacitor of low inherent inductance and should be placed as close to
the device as possible. In addition, a 4.7 F bulk electrolytic capacitor should be used
between V
power supply connection point. The purpose of the bulk capacitor is to overcome the voltage
drop caused by the inductive effects of PCB traces.
Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27C4001 are in the
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.
Although only '0's will be programmed, both '1's and '0's can be present in the data word.
The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The
M27C4001 is in the programming mode when V
pulsed to V
pins. The levels required for the address and data inputs are TTL. V
6.25V ± 0.25V.
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the whole array to be programmed with a
guaranteed margin, in a typical time of 52.5 seconds. Programming with PRESTO II
consists of applying a sequence of 100 s program pulses to each byte until a correct verify
occurs (see
automatically activated in order to guarantee that each cell is programmed with enough
margin. No overprogram pulse is applied since the verify in MARGIN MODE provides the
necessary margin to each programmed cell.
CC
IL
Figure
. The data to be programmed is applied to 8 bits in parallel to the data output
and V
5). During programming and verify operation, a MARGIN MODE circuit is
SS
for every eight devices. The bulk capacitor should be located near the
CC
PP
, has three segments that are of interest to
input is at 12.75V, G is at V
CC
CC
and V
is specified to be
Device operation
SS
. This should
IH
and E is
9/25

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