M25PE40-VMC6G NUMONYX, M25PE40-VMC6G Datasheet - Page 29

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M25PE40-VMC6G

Manufacturer Part Number
M25PE40-VMC6G
Description
IC SRL FLSH 4MB 75MHZ 8MLP
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25PE40-VMC6G

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-MLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
M25PE40
6.7
Figure 13. Read Data Bytes at Higher Speed (FAST_READ) instruction sequence
1. Address bits A23 to A19 are Don’t care.
S
C
D
Q
S
C
D
Q
Read Data Bytes at Higher Speed (FAST_READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes at Higher Speed (FAST_READ) instruction is followed by a 3-byte address (A23-
A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, is shifted out on Serial Data output (Q), each bit
being shifted out, at a maximum frequency f
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes at Higher Speed (FAST_READ)
instruction. When the highest address is reached, the address counter rolls over to
000000h, allowing the read sequence to be continued indefinitely.
The Read Data Bytes at Higher Speed (FAST_READ) instruction is terminated by driving
Chip Select (S) High. Chip Select (S) can be driven High at any time during data output. Any
Read Data Bytes at Higher Speed (FAST_READ) instruction, while an Erase, Program or
Write cycle is in progress, is rejected without having any effects on the cycle that is in
progress.
and data-out sequence
0
7
1
32 33 34
High Impedance
6
2
Instruction
Dummy byte
5
3
4
4
35
3
5
36 37 38 39 40 41 42 43 44 45 46
2
6
1
7
23
0
8
MSB
22 21
7
9 10
24-bit address
6
DATA OUT 1
5
Figure
3
28 29 30 31
4
2
3
C
1
13.
2
, during the falling edge of Serial Clock (C).
0
1
0
47
MSB
7
6
DATA OUT 2
5
4
3
2
1
0
MSB
7
Instructions
AI04006
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