SUPEVKIT Maxim Integrated, SUPEVKIT Datasheet - Page 5

• Manufacturer Part Number: SUPEVKIT
• Description: Power Management IC Development Tools Programmers, Development Systems
• Manufacturer: Maxim Integrated
• Series: SUPEVKITr

Specifications of SUPEVKIT

• Factory Pack Quantity: 1

PAD NAME
RESETOD
RESETOD
RESETBD
OVRSTIN
RSTIN1
RSTIN2
RESET
RESET
GND
V
WDI
MR
CC
Supply Voltage and Reset Threshold Monitor Input (1V to 5.5V)
Ground
Watchdog Input. A rising or falling transition must occur on this input within the selected watchdog timeout period, or a
reset will occur.
Undervoltage Reset Comparator Input. Asserts reset when the monitored voltage falls below the programmed thresh-
old. Set the reset threshold with an external resistor-divider.
Undervoltage Reset Comparator Input. Asserts reset when the monitored voltage falls below the programmed
threshold. Set the reset threshold with an external resistor-divider.
Overvoltage Reset Comparator Input. Asserts reset when the monitored voltage exceeds the programmed thresh-
old. Set the reset threshold with an external resistor-divider.
Manual Reset Input. A logic low on MR asserts reset. Reset remains asserted as long as MR is low, and for the
duration of the reset timeout period (t
Push/Pull, Active-High Reset Output. RESET changes from low to high whenever a reset condition occurs. After the
reset condition is terminated, RESET remains high for the duration of the reset timeout period and then goes low.
Open-Drain, Active-High Reset Output. RESETOD is asserted high whenever a reset condition occurs. After the reset
condition is terminated, RESETOD remains high for the duration of the reset timeout period.
Push/Pull, Active-Low Reset Output. RESET changes from high to low whenever a reset condition occurs. RESET
remains low for the duration of the reset timeout period. After the reset condition is terminated, RESET remains low
for the duration of the timeout period and then goes high.
Open-Drain, Active-Low Reset Output. RESETOD is asserted low whenever a reset condition occurs. After the reset
condition is terminated, RESETOD remains low for the duration of the reset timeout period.
Bidirectional, Active-Low Reset Output. RESETBD changes from high to low whenever a reset condition occurs.
After the reset condition is terminated, RESETBD remains low for the duration of the reset timeout period and then
goes high. In addition to the normal N-channel pull-down, RESETBD has a P-channel pull-up transistor in parallel
with a 4.7kΩ resistor to facilitate connection to µPs with bidirectional resets. See the MAX6314 data sheet.
_______________________________________________________________________________________
Supervisory Circuit Evaluation Kit
RP
) after the reset condition is terminated.
DESCRIPTION
Pad Description
5