ADP5034RE-EVALZ Analog Devices, ADP5034RE-EVALZ Datasheet - Page 17

• Manufacturer Part Number: ADP5034RE-EVALZ
• Description: Power Management IC Development Tools TSSOP ADJ Voltage Apps Board
• Manufacturer: Analog Devices
• Series: ADP5034r

Specifications of ADP5034RE-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Factory Pack Quantity: 1

Data Sheet
Thermal Protection
In the event that the junction temperature rises above 150°C,
the thermal shutdown circuit turns off all the regulators. Extreme
junction temperatures can be the result of high current opera-
tion, poor circuit board design, or high ambient temperature.
A 20°C hysteresis is included so that when thermal shutdown
occurs, the regulators do not return to operation until the on-chip
temperature drops below 130°C. When coming out of thermal
shutdown, all regulators restart with soft start control.
Undervoltage Lockout
To protect against battery discharge, undervoltage lockout
(UVLO) circuitry is integrated into the system. If the input
voltage on AVIN drops below a typical 2.15 V UVLO threshold,
all channels shut down. In the buck channels, both the power
switch and the synchronous rectifier turn off. When the voltage
on AVIN rises above the UVLO threshold, the part is enabled
once more.
PULL-DOWNS
PULL-DOWN
BUCK1,
BUCK2
VOUT1
VOUT3
VOUT4
VOUT2
LDO1,
LDO2
AVIN
(MIN)
30µs
50µs (MIN)
Figure 47. Regulator Sequencing on the ADP5034 (
Rev. D | Page 17 of 28
Alternatively, the user can select device models with a UVLO
set at a higher level, suitable for 5 V supply applications. For
these models, the device reaches the turn-off threshold when
the input supply drops to 3.65 V typical.
In case of a thermal or UVLO event, the active pull-downs (if
factory enabled) are enabled to discharge the output capacitors
quickly. The pull-down resistors remain engaged until the
thermal fault event is no longer present or the input supply
voltage falls below the V
V
Enable/Shutdown
The ADP5034 has an individual control pin for each regulator.
A logic level high applied to the ENx pin activates a regulator,
whereas a logic level low turns off a regulator.
Figure 47 shows the regulator activation timings for the
ADP5034 when all enable pins are connected to AVIN. Also
shown is the active pull-down activation.
POR
EN1 = EN2 = EN3 = EN4
V
is approximately 1 V.
UVLO
V
POR
(MIN)
30µs
= V
POR
AVIN
voltage level. The typical value of
)
50µs (MIN)
ADP5034