ADP2164-EVALZ Analog Devices, ADP2164-EVALZ Datasheet - Page 14

• Manufacturer Part Number: ADP2164-EVALZ
• Description: Power Management IC Development Tools LFCSP Adjustable Eval Board
• Manufacturer: Analog Devices
• Type: DC/DC Converters, Regulators & Controllersr
• Series: ADP2164r

Specifications of ADP2164-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: ADP2164
• Input Voltage: 2.7 V to 6.5 V
• Output Voltage: 0.6 V to 6.5 V
• Description/function: 4 A, synchronous, step-down DC to DC regulator
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Output Current: 4 A
• Factory Pack Quantity: 1
• For Use With: ADP2164

ADP2164
THEORY OF OPERATION
The
a fixed-frequency, peak current mode architecture with an
integrated high-side switch and low-side synchronous rectifier.
The high switching frequency and tiny, 16-lead, 4 mm × 4 mm
LFCSP package provide a small, step-down dc-to-dc regulator
solution. The integrated high-side switch (P-channel MOSFET)
and synchronous rectifier (N-channel MOSFET) yield high
efficiency.
The
and regulates the output voltage down to 0.6 V. The
also available with preset output voltage options of 3.3 V, 2.5 V,
1.8 V, 1.5 V, 1.2 V, and 1.0 V.
CONTROL SCHEME
The
PWM control architecture. At the start of each oscillator cycle,
the P-channel MOSFET switch is turned on, placing a positive
voltage across the inductor. Current in the inductor increases
until the current sense signal crosses the peak inductor current
level, turns off the P-channel MOSFET switch, and turns on the
N-channel MOSFET synchronous rectifier. This action places a
negative voltage across the inductor, causing the inductor current
to decrease. The synchronous rectifier stays on for the rest of
the cycle.
The peak inductor current level is set by the compensation
(COMP) voltage. The COMP voltage is the output of a transcon-
ductance error amplifier that compares the feedback voltage
with an internal 0.6 V reference (see Figure 36).
SLOPE COMPENSATION
To prevent subharmonic oscillations, slope compensation
stabilizes the internal current control loop of the
when the part operates at or beyond a 50% duty cycle. Slope
compensation is implemented by summing an artificial voltage
ramp with the current sense signal during the on time of the
P-channel MOSFET switch. This voltage ramp depends on the
output voltage. When operating at high output voltages, slope
compensation increases. The slope compensation ramp value
determines the minimum inductor value that can be used to
prevent subharmonic oscillations.
PRECISION ENABLE/SHUTDOWN
The EN pin is a precision analog input that enables the device
when the voltage exceeds 1.2 V (typical); this pin has 100 mV
hysteresis. When the enable voltage falls below 1.1 V (typical),
the part turns off. To force the
when input power is applied, connect the EN pin to the VIN pin.
When the
discharged. This causes a new soft start cycle to begin when
the part is reenabled.
An internal pull-down resistor (1 MΩ) prevents accidental
enabling of the part if the EN input is left floating.
ADP2164
ADP2164
ADP2164
ADP2164
operates with an input voltage from 2.7 V to 6.5 V
is a step-down dc-to-dc regulator that uses
uses a fixed-frequency, peak current mode
is shut down, the soft start capacitor is
ADP2164
to start automatically
ADP2164
ADP2164
Rev. A | Page 14 of 20
is
INTEGRATED SOFT START
The
output voltage rise time and reduce inrush current at startup.
The soft start time is set at 2048 clock cycles.
If the output voltage is precharged before the part is turned
on, the
would discharge the output capacitor—until the soft start
voltage exceeds the voltage on the FB pin.
OSCILLATOR AND SYNCHRONIZATION
The
If the RT pin is connected to GND, the switching frequency is
set to 600 kHz. If the RT pin is connected to VIN, the switching
frequency is set to 1.2 MHz.
Connecting a resistor from RT to GND allows programming
of the switching frequency from 500 kHz to 1.4 MHz. Use the
following equation to set the switching frequency:
Figure 37 shows the typical relationship between the switching
frequency and the RT resistor.
To synchronize the ADP2164, drive an external clock at the
SYNC pin. The frequency of the external clock can be in the
range of 500 kHz to 1.4 MHz.
When the SYNC pin is driven by an external clock, the user
can configure the switching frequency to be in phase with the
external clock or 180° out of phase with the external clock, as
follows:
•
•
ADP2164
ADP2164
If the RT pin is connected to GND or to a resistor, the
switching frequency is in phase with the external clock.
If the RT pin is connected to VIN, the switching frequency
is 180° out of phase with the external clock.
RT
1600
1400
1200
1000
800
600
400
200
ADP2164
(k
20
Ω
)
Figure 37. Switching Frequency vs. RT Resistor
=
has integrated soft start circuitry to limit the
switching frequency is controlled by the RT pin.
40
f
54
prevents a reverse inductor current—which
S
(kHz)
,
000
60
RT RESISTOR (kΩ)
80
100
120
140
Data Sheet
160
180