450-0018 LS Research, 450-0018 Datasheet - Page 12

• Manufacturer Part Number: 450-0018
• Description: Zigbee / 802.15.4 Modules SiFLEX02 Zigbee Mod 900 Mhz helical ant
• Manufacturer: LS Research

Specifications of 450-0018

• Rohs: yes
• Frequency Band: 900 MHz
• Line Of Sight Range: 2 miles
• Data Rate: 1 Mbps
• Sensitivity: - 102 dBm
• Operating Supply Voltage: 2 V to 3.45 V
• Supply Current Transmitting: 285 mA
• Supply Current Receiving: 30 mA
• Output Power: 250 mW
• Antenna Connector Type: Helical
• Maximum Operating Temperature: + 85 C
• Dimensions: 1.63 in x 0.9 in x 0.2 in
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 50

SiFLEX02 TRANSCEIVER MODULE
DATASHEET
The XMEGA A3 devices have five software selectable power saving modes. The Idle mode stops the
CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and all peripherals
to continue functioning. The Power-down mode saves the SRAM and register contents but stops the
oscillators, disabling all other functions until the next TWI or pin-change interrupt, or Reset. In Power-
save mode, the asynchronous Real Time Counter continues to run, allowing the application to maintain
a timer base while the rest of the device is sleeping. In Standby mode, the Crystal/Resonator Oscillator
is kept running while the rest of the device is sleeping. This allows very fast start-up from external
crystal combined with low power consumption. In Extended Standby mode, both the main Oscillator
and the Asynchronous Timer continue to run. To further reduce power consumption, the peripheral
clock for each individual peripheral can optionally be stopped in Active mode and Idle sleep mode.
Radio
The AT86RF212 is a low-power, low-voltage 800/900 MHz transceiver specially designed for low-cost
IEEE 802.15.4, ZigBee™, and high data rate ISM applications. For the sub-1 GHz bands, it supports a
low data rate of 40kbps of the IEEE 802.15.4-2003 standard [2] and provides an optional data rate
250kbps using O-QPSK, according to IEEE 802.15.4-2006. Furthermore hardware accelerators
improve overall system power efficiency and timing.
The receiver path is based on a low-IF architecture. After channel filtering and down conversion the
low-IF signal is sampled and applied to the digital signal processing part. Communication between
transmitter and receiver is based on direct sequence spread spectrum with different modulation
schemes and spreading codes. The AT86RF212 supports the IEEE 802.15.4-2006 standard
mandatory BPSK modulation and optional O-QPSK modulation in the 800 and 900 MHz band. For
applications not necessarily targeting IEEE compliant networks the radio transceiver supports
proprietary High Data Rate Modes based on O-QPSK.
The AT86RF212 features hardware supported 128 bit security operation. The standalone AES
encryption/decryption engine can be accessed in parallel to all PHY operational modes. Configuration
of the AT86RF212, reading, and writing of data memory as well as the AES hardware engine are
controlled by the SPI interface and additional control signals.
The information in this document is subject to change without notice.
330-0009-R3.1
Copyright © 2009-2012 LS Research, LLC
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