DK-START-5AGXB3NES Altera Corporation, DK-START-5AGXB3NES Datasheet - Page 24

• Manufacturer Part Number: DK-START-5AGXB3NES
• Description: Programmable Logic IC Development Tools FPGA Starter Kit For 5AGXFB3H4F
• Manufacturer: Altera Corporation
• Type: FPGAr

Specifications of DK-START-5AGXB3NES

• Rohs: yes
• Product: Starter Kits
• Tool Is For Evaluation Of: 5AGXB3
• For Use With: 5AGXB3

6–2
Preparing the Board
Running the Board Test System
Arria V GX Starter Kit
User Guide
1
1
After successful FPGA configuration, the appropriate tab appears that allows you to
exercise the related board features. Highlights appear in the board picture around the
corresponding components.
The Power Monitor button starts the Power Monitor application that measures and
reports current power information for the board. Because the application
communicates over the JTAG bus to the MAX V device, you can measure the power of
any design in the FPGA, including your own designs.
The Board Test System and Power Monitor share the JTAG bus with other
applications like the Nios II debugger and the SignalTap
Analyzer. Because the Quartus II programmer uses most of the bandwidth of the
JTAG bus, other applications using the JTAG bus might time out. Be sure to close the
other applications before attempting to reconfigure the FPGA using the Quartus II
Programmer.
With the power to the board off, following these steps:
1. Connect the USB cable to the board.
2. Ensure that the development board switches and jumpers are set to the default
3. Turn on the power to the board. The board loads the design stored in the user
To run the application, navigate to the <install
dir>\kits\arriaVGX_5agxfb3hf35_start\examples\board_test_system directory and
run the BoardTestSystem.exe application.
On Windows, click Start > All Programs > Altera > Arria V GX Starter Kit <version>
> Board Test System to run the application.
A GUI appears, displaying the application tab that corresponds to the design running
in the FPGA. The Arria V GX starter board’s flash memory ships preconfigured with
the design that corresponds to the GPIO, Flash, and SRAM tabs.
positions as shown in the
page
(SW4.3) to the user on (0) position.
f
hardware 1 portion of flash memory into the FPGA. If your board is still in the
factory configuration, or if you have downloaded a newer version of the Board
Test System to flash memory through the Board Update Portal, the design loads
the GPIO and flash memory tests.
c
4–2, except for DIP switch SW4.3, which should be set the FAC_LOAD
For more information about the board’s DIP switch and jumper settings,
refer to the
To ensure operating stability, keep the USB cable connected and the board
powered on when running the demonstration application. The application
cannot run correctly unless the USB cable is attached and the board is on.
Arria V GX Starter Board Reference
“Factory Default Switch Settings”
Manual.
®
II Embedded Logic
February 2013 Altera Corporation
Chapter 6: Board Test System
section starting on
Preparing the Board