MT48LC4M16A2TG-6:G TR Micron Technology Inc, MT48LC4M16A2TG-6:G TR Datasheet - Page 41
![IC SDRAM 64MBIT 167MHZ 54TSOP](/photos/7/22/72261/557-54-tsop_sml.jpg)
MT48LC4M16A2TG-6:G TR
Manufacturer Part Number
MT48LC4M16A2TG-6:G TR
Description
IC SDRAM 64MBIT 167MHZ 54TSOP
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC4M16A2P-75G_TR.pdf
(72 pages)
Specifications of MT48LC4M16A2TG-6:G TR
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (4M x 16)
Speed
167MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 41 of 72
- Download datasheet (4Mb)
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
10. READs or WRITEs listed in the Command (Action) column include READs or WRITEs with
11. Does not affect the state of the bank and acts as a NOP to that bank.
6. All states and sequences not shown are illegal or reserved.
7. Not bank-specific; requires that all banks are idle.
8. May or may not be bank-specific; if all banks are to be precharged, all must be in a valid
9. Not bank-specific; BURST TERMINATE affects the most recent READ or WRITE burst, regard-
state for precharging.
less of bank.
auto precharge enabled and READs or WRITEs with auto precharge disabled.
Accessing mode
Precharging all: Starts with registration of a PRECHARGE ALL command and ends when
register:
Starts with registration of a LOAD MODE REGISTER command and ends
when
banks idle state.
t
RP is met. After
t
MRD has been met. After
41
t
RP is met, all banks will be in the idle state.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
MRD is met, the SDRAM will be in the all
64Mb: x4, x8, x16 SDRAM
©2000 Micron Technology, Inc. All rights reserved.
Commands
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