LFXP2-5E-B2-EVN Lattice, LFXP2-5E-B2-EVN Datasheet - Page 14

• Manufacturer Part Number: LFXP2-5E-B2-EVN
• Description: Programmable Logic IC Development Tools Lattice XP2 Brevia Dev Kit
• Manufacturer: Lattice
• Type: FPGAr

Specifications of LFXP2-5E-B2-EVN

• Rohs: yes
• Product: Development Kits
• Tool Is For Evaluation Of: LFXP2-5E-6TN144C
• Interface Type: JTAG, USB
• Operating Supply Voltage: 1.2 V
• Description/function: LatticeXP2 Brevia 2 development kit
• Dimensions: 3 in x 3 in x 0.5 in
• Maximum Operating Temperature: + 55 C
• Minimum Operating Temperature: 0 C
• Factory Pack Quantity: 1

Lattice Semiconductor
Please note the JTAG header is not populated by default. It is recommended to use the USB mini cable and on-
board USB configuration circuit as described elsewhere in this document.
Table 7. JTAG Programming Interface
FPGA
The Lattice XP2 Brevia 2 Evaluation Board is based on the LatticeXP2 non-volatile FPGA. The board is populated
with a 5K LUT device in a 144 TQFP package. A complete description of the device can be found in the
Family Data Sheet
Software Requirements
Install the Lattice Diamond software before you begin developing designs for the evaluation board.
Mechanical Specifications
Dimensions: 3 in (L) x 3 in (W) x 1/2 in (H)
Environmental Requirements
The evaluation board must be stored between -40° C and 100° C. The recommended operating temperature is
between 0° C and 55° C. The evaluation board can be damaged without proper anti-static handling.
JTAG Connector J1
JTAG Connector
Pin Number
1
2
3
4
5
6
7
8
and on the
JTAG Connector
Pin Name
LatticeXP2 web
GND
3.3V
TDO
TMS
TCK
TDI
—
—
SRAM Signal Name
SRAM_WEb
SRAM_OEb
SRAM_CSb
Addr_10
Addr_11
Addr_12
Addr_13
Addr_14
Addr_15
Addr_16
Addr_4
Addr_5
Addr_6
Addr_7
Addr_8
Addr_9
page.
Pin Number
FPGA
14
82
80
79
81
—
—
—
—
FPGA Pin
Number
123
124
125
127
129
130
131
132
133
134
137
138
141
142
143
144
Pin Name
FPGA
TDO
TMS
TCK
TDI
—
—
—
—
Pin Functionality
User’s Guide
None
None
GND
VCC
TDO
TMS
TCK
TDI
LatticeXP2