GLS85LS1002P-S-I-1MS-K Greenliant, GLS85LS1002P-S-I-1MS-K Datasheet - Page 2

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GLS85LS1002P-S-I-1MS-K

Manufacturer Part Number
GLS85LS1002P-S-I-1MS-K
Description
Memory IC Development Tools 2GB SLC NANDrive EB Mini SATA Connector
Manufacturer
Greenliant

Specifications of GLS85LS1002P-S-I-1MS-K

Rohs
yes
1.0
Each SATA NANDrive contains an integrated SATA NAND flash memory controller and up to eight discrete
NAND flash die in a BGA package. Refer to Figure 2-1 for the SATA NANDrive block diagram.
1.1
The heart of SATA NANDrive is the SATA NAND flash
memory controller which translates standard SATA
signals into flash media data and control signals. The
following components contribute to SATA NANDrive’s
operation.
1.1.1
The MCU translates SATA commands into data and
control signals required for flash media operation.
1.1.2
SATA NANDrive uses internal DMA allowing instant
data transfer from/to buffer to/from flash media. This
implementation eliminates microcontroller overhead
associated
approach, thereby increasing the data transfer rate.
1.1.3
The PMU controls the power consumption of SATA
NANDrive. The PMU dramatically reduces the power
consumption of SATA NANDrive by putting the part of
the circuitry that is not in operation into sleep mode.
The Flash File System handles inadvertent power
interrupts and has auto-recovery capability to ensure
SATA NANDrive firmware integrity. For regular power
management,
IDLE_IMMEDIATE command and wait for command
ready before powering down SATA NANDrive.
These specifications are subject to change without notice.
© 2013 Greenliant Systems
GLS85LS1002P / 1004P / 1008P
Industrial Grade
3)
GENERAL DESCRIPTION
Optimized SATA NANDrive
Microcontroller Unit (MCU)
Internal Direct Memory Access (DMA)
Power Management Unit (PMU)
For management of the Sleep Mode, please refer to
“SATA NANDrive Application Design Guide.”
with
the
the
SATA NANDrive™
Host
traditional,
must
firmware-based
send
an
3)
2
1.1.4
The embedded flash file system is an integral part of
SATA NANDrive. It contains MCU firmware that
performs the following tasks:
1.1.5
High performance is achieved through optimized
hardware error detection and correction.
1.1.6
The Serial Communication Interface (SCI) is designed
for error reporting. During the product development
stage, it is recommended to provide the SCI port on
the PCB to aid in design validation.
1.1.7
The multi-tasking interface enables fast, sequential
write performance by allowing concurrent Read,
Program and Erase operations to multiple flash media.
1.2
The SATA NANDrive family utilizes standard NAND
flash for data storage. Because the high temperature
in a surface-mount soldering reflow process may alter
the content on NAND flash, it is recommended to
program SATA NANDrive after the reflow process.
1.3
SATA
advanced wear-leveling algorithms to substantially
increase the longevity of NAND flash media. Wear
caused by data writes is evenly distributed in all or
select blocks in the device that prevents “hot spots” in
locations that are programmed and erased extensively.
This effective wear-leveling technique results in
optimized device endurance, enhanced data retention
and higher reliability required by long-life applications.
1. Translates host side signals into flash media
2. Provides flash media wear leveling to spread the
3. Keeps track of data file structures
4. Manages system security for the selected
writes and reads
flash writes across all memory address space to
increase the longevity of flash media
protection zones
Embedded Flash File System
Error Correction Code (ECC)
Serial Communication Interface (SCI)
Multi-tasking Interface
SMT Reflow Consideration
Advanced NAND Management
NANDrive’s
integrated
Fact Sheet 02.100
controller
January 2013
01/18/2013
S71432-F
uses

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