GLS85LS1008A-M-C-1MS-K Greenliant, GLS85LS1008A-M-C-1MS-K Datasheet - Page 4
![no-image](/images/manufacturer_photos/0/2/284/greenliant_sml.jpg)
GLS85LS1008A-M-C-1MS-K
Manufacturer Part Number
GLS85LS1008A-M-C-1MS-K
Description
Memory IC Development Tools 16GByte NAN Eval Bd /Mini SATA Conn
Manufacturer
Greenliant
Datasheet
1.GLS85LS1008A-C-M-1MS-K.pdf
(7 pages)
Specifications of GLS85LS1008A-M-C-1MS-K
Rohs
yes
Table 3-2: I/O Type
These specifications are subject to change without notice.
© 2012 Greenliant Systems
GLS85LS1004A / 1008A / 1016A / 1032A
Commercial Grade SATA NANDrive™
V DD12AS
V DD12AP
SCID OUT
Table 3-1: Pin Assignments
WP#/PD#
V DD33N
Symbol
RESET#
VDD33A
SCICLK
SCID IN
XCLKO
V SSAP
V DD33
V DD12
I/O Type
XCLKI
V SST
V SSA
VSSX
DNU
RX+
RFU
Rext
V SS
TX+
RX-
TX-
NC
I2D
I2U
XO
O3
O1
XI
I3
A2, A3, A4, A5, A6, A7, A8, A9, A10, B1,
T4, T8, T9, T10, U2, U3, U4, U5, U6, U7,
L9, L10, M9, M10, N8, N9, N10, P4, P8,
F3, F4, F5, F6, F7, F8, F9, H5, H8, L4,
AC3, AC4, AC5, AC6, AC7, AC8, AC9,
P9, P10, R2, R3, R4, R8, R9, R10, T3,
G10, H9, H10, J8, J9, J10, K8, K9, L8,
B11, AB1, AB2, AB3, AB4, AB5, AB6,
U9, U10, V3, V4, V5, V6, V7, V9, W4,
B2, B3, B4, B5, B6, B7, B8, B9, B10,
AB7, AB8, AB9, AB10, AB11, AC2,
Crystal Clock Output
Input with Pull-down
Crystal Clock Input
E3, F2, F10, V2, V10, W3, W9
G4, G5, G6, G7, G8, G9, H4
Input with Pull-up
Analog Output
Analog Input
Description
Output
E6, E7, E8, E9
J4, K4, L3, M3
W5, W6, W7
H3, J3, K2
Ball No.
M4, N4
E4, E5
AC10
T2
K10
W8
M2
V8
U8
M8
G2
G3
H2
K3
P2
P3
N3
N2
J2
L2
4)
Serial Communication Interface (SCI)
4)
The command to configure the T2 pin in either PD# or WP# is prepared by the
vendor-unique command. Please ask your Greenliant contact for details on the
SMART command specification.
Analog PWR
Analog PWR
Analog PWR
Analog GND
Analog GND
Digital PWR
Digital PWR
Digital PWR
Digital GND
Ball Type
Host Side Interface
Power and Ground
GND
O
O
O
O
I
I
I
I
I
I
I
I
Miscellaneous
4
IO Type
I2U
I2U
I2U
I2U
O1
XO
O3
O3
XI
I3
I3
I3
Analog Differential Input (+)
Analog Differential Input (-)
Analog Differential Output (+)
Analog Differential Output(-)
SCI port data input
SCI port data output. No external pull-up or pull-down
resistor should connect to this signal.
SCI port clock
Reserved for Future Use
External Resistor, 1Kohms (1%) connected to GND
This input is the active low hardware reset from host.
The WP#/PD# can be used for either the Write Protect mode
or Power Down mode, but only one mode is active at any
time.
External clock source input for main clock; 25MHz crystal,
need external 20pf capacitor to ground
External clock source output for main clock;
25MHz crystal, need external 20pf capacitor to ground
No connect
Do Not Use. All these pins should not be connected.
Supply voltage 3.3V
Supply voltage 1.2V
Analog supply voltage 1.2V (200mA max. total for both 1.2V
analog power rails, VDD12AS and VDD12AP)
Digital ground
Analog ground
Connected to PCB ground plane for thermal dissipation. Not
connected to any internal signal.
Analog ground
Analog ground
Name and Functions
Fact Sheet 01.004
May 2012
05/22/2012
S71429-F