S-24CS64A0I-J8T1G Seiko Instruments, S-24CS64A0I-J8T1G Datasheet - Page 21

• Manufacturer Part Number: S-24CS64A0I-J8T1G
• Description: IC EEPROM 64KBIT 400KHZ 8SOP
• Manufacturer: Seiko Instruments

Specifications of S-24CS64A0I-J8T1G

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 64K (8K x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Rev.4.2
3. Matching phases while E
The S-24CS64A does not have a pin for resetting (the internal circuit), therefore, the E
forcibly reset externally. If a communication interruption occurs in the E
software.
For example, even if a reset signal is input to the microprocessor, the internal circuit of the E
reset as long as the stop condition is not input to the E
same status and cannot shift to the next operation. This symptom applies to the case when only the
microprocessor is reset when the power supply voltage drops. With this status, if the power supply voltage
is restored, reset the E
The following shows this reset method.
[How to reset E
The E
is outputting the acknowledge signal, 0 is output to the SDA line. In this status, the microprocessor
cannot output an instruction to the SDA line. In this case, terminate the acknowledge output operation
or read operation, and then input a start instruction. Figure 25 shows this procedure.
First, input the condition. Then transmit 9 clocks (dummy clocks) of SCL. During this time, the
microprocessor sets the SDA line to high level.
acknowledge output operation or data output, so input the start condition
input, the E
operation is then possible.
*1. After 9 clocks (dummy clocks), if the SCL clock continues to be output without a start condition
Remark It is recommended to perform the above reset using dummy clocks when the system is
_00
being input, a write operation may be started upon receipt of a stop condition. To prevent this, input
a start condition after 9 clocks (dummy clocks).
SDA
SCL
2
PROM can be reset by the start and stop instructions. When the E
initialized after the power supply voltage has been raised.
2
PROM is reset. To make doubly sure, input the stop condition to the E
2
PROM]
condition
Start
2
PROM (after matching the phase with the microprocessor) and input an instruction.
2
PROM is accessed
1
Figure 25 Resetting E
Seiko Instruments Inc.
Dummy clock
2
8
2
PROM. In other words, the E
By this operation, the E
9
2
PROM
2-WIRE CMOS SERIAL E
condition
Start
2
2
*1
PROM, it must be reset by
PROM is reading data “0” or
. When a start condition is
2
PROM interrupts the
2
2
PROM retains the
PROM cannot be
2
PROM. Normal
condition
S-24CS64A
Stop
2
PROM is not
2
PROM
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