TWR-PXS3020-KIT Freescale Semiconductor, TWR-PXS3020-KIT Datasheet - Page 2

• Manufacturer Part Number: TWR-PXS3020-KIT
• Description: Development Boards & Kits - Other Processors PXS30 Tower MCU Kit
• Manufacturer: Freescale Semiconductor

Specifications of TWR-PXS3020-KIT

• Rohs: yes
• Product: Development Kits
• Core: e200z7
• Interface Type: CAN, I2C, SPI, UART
• Operating Supply Voltage: 1.2 V

The PXS30 dual-core architecture can be
statically switched from lockstep mode
to decoupled parallel mode (independent
core operation) for applications needing
maximum performance or software diversity.
A wide variety of industrial applications can
be supported, such as motion and power
control. For example, the new cross-triggering
unit allows control of up to two brushless DC
motors or multiple actuators with a minimum
interrupt load. Additional features include
Ethernet, a fault collection unit, multiple
communication modules, two 12-bit ADCs,
eTimer units and a built-in hardware self test.
SafeAssure Program:
Functional Safety. Simplified.
Freescale’s SafeAssure functional safety
program is designed to help system
manufacturers more easily achieve system
compliance with functional safety standards:
International Standards Organization (ISO)
26262 and IEC 61508. The program
highlights Freescale solutions—hardware
and software—that are optimally designed to
support functional safety implementations and
come with a rich set of enablement collateral.
For more information, visit
freescale.com/SafeAssure.
Development Tools
• MQX™
• RAppID
• FreeMASTER
• CodeWarrior
• Green Hills Software
• Tower System
For current information about PXS30 family products
and documentation, please visit
and
Freescale, the Freescale logo and CodeWarrior are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. SafeAssure
and the SafeAssure logo are trademarks of Freescale Semiconductor, Inc. The Power Architecture and Power.org word marks and the
Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. All other product or service
names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc.
Document Number: PXS30FS REV 1
System Challenges
Reduce System
Costs and Simplify
Design
Precise Control
for Real-Time
Applications
Temperature Range: -40ºC to +105ºC: Select Parts +125°C
Product Number
PXS3010
PXS3015
PXS3020
Selector Guide
Challenges and Solutions
freescale.com/Tower
PXS30 Solutions
• Reduces design complexity and component count by putting key functional
• Dual processing spheres, including CPU, DMA, interrupt controller, crossbar and
• Dual z7 CPU architecture provides performance to address real-time applications and
• Lockstep operation provides a software environment for redundant processing
• Independent core operation (dual parallel mode) provides a software environment
• Built-in flexible hardware self-test capabilities provide diagnostic coverage both
• Fault collection and control unit manages MCU behavior in the event internal
• FlexRay™ protocol and safety ports for robust communications
• Probability of undetected failure per hour (PFH) = 0.1 FIT (one failure per every
• Designed to target safety requirements outlined in IEC61511 and IEC61508
• e200 z7 CPU at 180 MHz provides computational performance targeted at
• Dual-core architecture provides computation ability for complex applications or
• Precise control of integrated electric motor control periphery
• Advanced PWM for specialized multi-phase motor control requirements
• Configurable alignment
• High frequency above 100 MHz
• Dead time insertion
• Skew correction
• Cross-triggering unit coordinates ADC, timer and PWM generation and
• Two 12-bit ADCs offer precise conversion for an improved driving experience
• FlexRay protocol for fault-tolerant communications with other networked
• Up to 2 MB flash
• Up to 512 KB SRAM
• Motor control library of common functions
• Ability to control two three-phase motors
Speed (MHz)
150
180
180
safety features on a single chip
MPU for logic level fault detection
cross-checking functions common in many safety strategies, which reduces hardware
and software complexity used in multiple MCU designs. The architecture can be run in
two statistically configurable modes of operation.
and calculations
for diverse processing and calculations to increase performance or to cross
check for reliable operation
at logic and memory level
MCU logic faults and signals these to external system components
10 billion hours)
(SIL3), which reduces system cost and effort
vector-oriented control of motor applications
cross-checking requirements of safety applications
minimizes CPU interrupt load eTimer units handle rotor position and speed
acquisition and offer six dual-action IC/OC channels with incremental/quadrature
encoder mode
modules within the vehicle
freescale.com/PXS30
Flash/RAM
1 MB/256 KB
1.5 MB/384 KB
2 MB/512 KB
Package
257 MAPBGA
473 MAPBGA
473 MAPBGA