AT28HC256-90LM/883 Atmel, AT28HC256-90LM/883 Datasheet

IC EEPROM 256KBIT 90NS 32LCC

AT28HC256-90LM/883

Manufacturer Part Number
AT28HC256-90LM/883
Description
IC EEPROM 256KBIT 90NS 32LCC
Manufacturer
Atmel
Datasheets

Specifications of AT28HC256-90LM/883

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
256K (32K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Package / Case
32-LCC
Density
256Kb
Interface Type
Parallel
Organization
32Kx8
Access Time (max)
90ns
Write Protection
Yes
Data Retention
10Year
Operating Supply Voltage (typ)
5V
Operating Temp Range
-55C to 125C
Supply Current
80mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT28HC256-90LM883

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Features
1. Description
The AT28HC256 is a high-performance electrically erasable and programmable read-
only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-
tured with Atmel’s advanced nonvolatile CMOS technology, the AT28HC256 offers
access times to 70 ns with power dissipation of just 440 mW. When the AT28HC256
is deselected, the standby current is less than 5 mA.
The AT28HC256 is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the address and 1 to 64
bytes of data are internally latched, freeing the addresses and data bus for other oper-
ations. Following the initiation of a write cycle, the device will automatically write the
latched data using an internal control timer. The end of a write cycle can be detected
by DATA Polling of I/O7. Once the end of a write cycle has been detected a new
access for a read or write can begin.
Atmel’s 28HC256 has additional features to ensure high quality and manufacturability.
The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
64 bytes of EEPROM for device identification or tracking.
Fast Read Access Time – 70 ns
Automatic Page Write Operation
Fast Write Cycle Times
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Single 5V ± 10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Full Military and Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option
– Internal Address and Data Latches for 64 Bytes
– Internal Control Timer
– Page Write Cycle Time: 3 ms or 10 ms Maximum
– 1 to 64-byte Page Write Operation
– 80 mA Active Current
– 3 mA Standby Current
– Endurance: 10
– Data Retention: 10 Years
4
or 10
5
Cycles
256 (32K x 8)
High-speed
Parallel
EEPROM
AT28HC256
0007L–PEEPR–03/08

Related parts for AT28HC256-90LM/883

AT28HC256-90LM/883 Summary of contents

Page 1

... When the AT28HC256 is deselected, the standby current is less than 5 mA. The AT28HC256 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

Page 2

... OE 1 A11 A13 VCC 7 A14 8 A12 2.2 28-lead PGA Top View AT28HC256 2 Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect 2.3 32-pad LCC, 32-lead PLCC Top View 28 A10 I/O7 25 I/O6 24 I/O5 23 I/O4 22 I/O3 21 GND 20 I/O2 ...

Page 3

... Read The AT28HC256 is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state when either high. This dual-line control gives designers flexibility in preventing bus contention in their system ...

Page 4

... After writing the 3-byte command sequence and after t protected against inadvertent write operations. It should be noted, that once protected the host may still perform a byte or page write to the AT28HC256. This is done by preceding the data to be written by the same 3-byte command sequence. ...

Page 5

... ( ( *NOTICE: + 0.6V CC Condition I/O CC AT28HC256-90 AT28HC256- 0. AT28HC256-90, - MHz OUT AT28HC256 AT28HC256-12 -40°C - 85°C -40°C - 85°C -55°C - 125°C 5V ± 10% 5V ± 10 Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...

Page 6

... This parameter is characterized and is not 100% tested. AT28HC256 6 AT28HC256-70 Min Max (1)(2)(3)( after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT28C256-90 AT28HC256-12 Min Max Min Max 90 120 90 120 ACC after an address change CE ACC OE 0007L– ...

Page 7

... Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 0007L–PEEPR–03/ < Max 6 12 AT28HC256 Units Conditions OUT 7 ...

Page 8

... Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH t Time to Data Valid DV Note Restriction. 15. AC Write Waveforms 15.1 WE Controlled 15.2 CE Controlled AT28HC256 8 Min Max Units 100 50 0 (1) NR 0007L–PEEPR–03/ ...

Page 9

... A6 through A14 must specify the same page address during each high to low transition of WE (or CE must be high only when WE and CE are both low. 18. Chip Erase Waveforms 0007L–PEEPR–03/08 Min AT28HC256 AT28HC256F 100 50 (1)( µsec (min msec (min 12.0V ± 0. AT28HC256 Typ Max Units 150 µ ...

Page 10

... Software Protected Write Cycle Waveforms Notes through A14 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered must be high only when WE and CE are both low. AT28HC256 10 20. Software Data Protection Disable Algorithm (2) ...

Page 11

... Toggle Bit Waveforms Notes: 1. Toggling either both OE and CE will operate toggle bit. 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. 0007L–PEEPR–03/08 (1) Min 6. (1) Min 150 6. AT28HC256 Typ Max Typ Max Units ns ...

Page 12

... Normalized I Graphs CC AT28HC256 12 0007L–PEEPR–03/08 ...

Page 13

... AT28HC256(E,F)-90JI AT28HC256(E,F)-90PI AT28HC256(E,F)-90SI AT28HC256(E,F)-90TI AT28HC256(E,F)-90DM/883 AT28HC256(E,F)-90FM/883 AT28HC256(E,F)-90LM/883 AT28HC256(E,F)-90UM/883 AT28HC256(E,F)-12JI AT28HC256(E,F)-12PI AT28HC256(E,F)-12SI AT28HC256(E,F)-12TI AT28HC256(E,F)-12DM/883 AT28HC256(E,F)-12FM/883 AT28HC256(E,F)-12LM/883 AT28HC256(E,F)-12UM/883 Package Type Options AT28HC256 Package Operation Range 32J 28P6 ...

Page 14

... Ceramic Pin Grid Array (PGA) Blank Standard Device: Endurance = 10K Write Cycles; Write Time = High Endurance Option: Endurance = 100K Write Cycles F Fast Write Option: Write Time = 3 ms AT28HC256 14 Ordering Code 5962-88634 03 UX 5962-88634 03 XX 5962-88634 03 YX 5962-88634 03 ZX 5962-88634 04 UX ...

Page 15

... Plastic Thin Small Outline Package (TSOP) 0007L–PEEPR–03/08 Ordering Code AT28HC256(E, F)-70JU AT28HC256(E, F)-70SU AT28HC256(E, F)-70TU AT28HC256(E, F)-90JU AT28HC256(E, F)-90SU AT28HC256(E, F)-90TU AT28HC256(E, F)-12JU AT28HC256(E, F)-12SU AT28HC256(E, F)-12TU Package Type AT28HC256 Package Operation Range 32J 28S 28T 32J ...

Page 16

... Fast Write Option: Write Time = 3 ms 28. Ordering Information Note Previous datasheets included the low power suffixes L, LE and LF on the AT28HC256 for 120 ns and 90 ns speeds. The low power parameters are now standard; therefore, the L, LE and LF suffixes are no longer required. ...

Page 17

... San Jose, CA 95131 R 0007L–PEEPR–03/08 37.85(1.490) 36.58(1.440) 33.02(1.300) REF 1.65(0.065) 1.14(0.045) 15.70(0.620) 15.00(0.590) 0º~ 15º REF 17.80(0.700) MAX TITLE 28D6, 28-lead, 0.600" Wide, Non-windowed, Ceramic Dual Inline Package (Cerdip) AT28HC256 PIN 1 15.49(0.610) 12.95(0.510) 0.127(0.005)MIN 1.52(0.060) 0.38(0.015) 0.66(0.026) 0.36(0.014) DRAWING NO. 10/23/03 REV. 28D6 B ...

Page 18

... Dimensions in Millimeters and (Inches). Controlling dimension: Inches. MIL-STD 1835 F-12 Config B PIN #1 ID 18.49(0.728) 18.08(0.712) 10.57(0.416) 0.23(0.009) 0.10(0.004) 2325 Orchard Parkway San Jose, CA 95131 R AT28HC256 18 9.75(0.384) 1.96(0.077) 1.09(0.043) 7.26(0.286) 6.96(0.274) TITLE 28F, 28-lead, Non-windowed, Ceramic Bottom-brazed Flat Package (FlatPack) 9.40(0.370) 6.35(0.250) ...

Page 19

... Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R 0007L–PEEPR–03/08 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) AT28HC256 0.318(0.0125) 0.191(0.0075 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 3.175 – ...

Page 20

... LCC Dimensions in Millimeters and (Inches). Controlling dimension: Inches. MIL-STD 1835 C-12 14.22(0.560) 13.72(0.540) 10.16(0.400) BSC 1.27(0.050) TYP 2325 Orchard Parkway San Jose, CA 95131 R AT28HC256 20 11.63(0.458) 11.23(0.442) PIN 1 1.40(0.055) 1.14(0.045) 2.41(0.095) 1.91(0.075) 0.305(0.012) 0.178(0.007) 0.737(0.029) 0.533(0.021) 1.02(0.040) X 45˚ ...

Page 21

... Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 0007L–PEEPR–03/08 D PIN 0º ~ 15º REF eB TITLE 28P6, 28-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP) AT28HC256 E1 A1 COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM A – – A1 0.381 – D 36.703 – ...

Page 22

... SOIC Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. 2325 Orchard Parkway San Jose, CA 95131 R AT28HC256 22 0.51(0.020) 0.33(0.013) 7.60(0.2992) 7.40(0.2914) PIN 1 1.27(0.50) BSC TOP VIEW 18.10(0.7125) 17.70(0.6969) 0.30(0.0118) 0.10(0.0040) 0º ~ 8º 1.27(0.050) 0.40(0.016) TITLE 28S, 28-lead, 0.300" Body, Plastic Gull Wing Small Outline (SOIC) JEDEC Standard MS-013 10 ...

Page 23

... Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R 0007L–PEEPR–03/08 PIN SEATING PLANE A1 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) AT28HC256 0º ~ 5º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – – ...

Page 24

... PGA Dimensions in Millimeters and (Inches). Controlling dimension: Inches. 16.71(0.658) 16.31(0.642) 2325 Orchard Parkway San Jose, CA 95131 R AT28HC256 24 13.74(0.540) 2.57(0.101) 13.36(0.526) 2.06(0.081) 15.24(0.600) 14.88(0.586) 14.17(0.558) 13.77(0.542) 2.54(0.100) TYP 12.70(0.500) TYP 2.54(0.100) TYP 10.41(0.410) 9.91(0.390) TITLE 28U, 28-pin, Ceramic Pin Grid Array (PGA) 7 ...

Page 25

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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