24AA1025-I/SN Microchip Technology, 24AA1025-I/SN Datasheet - Page 5

IC EEPROM 1MBIT 400KHZ 8SOIC

24AA1025-I/SN

Manufacturer Part Number
24AA1025-I/SN
Description
IC EEPROM 1MBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheet

Specifications of 24AA1025-I/SN

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1M (128K x 8)
Speed
100kHz, 400kHz
Interface
I²C
Voltage - Supply
1.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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2.0
The descriptions of the pins are listed in
TABLE 2-1:
2.1
The A0 and A1 inputs are used by the 24XX1025 for
multiple device operations. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the comparison is true.
Up to four devices may be connected to the same bus
by using different Chip Select bit combinations. In most
applications, the chip address inputs A0 and A1 are
hard-wired to logic ‘0’ or logic ‘1’. For applications in
which these pins are controlled by a microcontroller or
other programmable device, the chip address pins
must be driven to logic ‘0’ or logic ‘1’ before normal
device operation can proceed.
2.2
The A2 input is non-configurable Chip Select. This pin
must be tied to V
If left floating or tied to V
undefined.
 2011 Microchip Technology Inc.
Name PDIP SOIJ SOIC
SDA
SCL
V
V
WP
A0
A1
A2
CC
SS
PIN DESCRIPTIONS
A0, A1 Chip Address Inputs
A2 Chip Address Input
1
2
3
4
5
6
7
8
CC
1
2
3
4
5
6
7
8
PIN FUNCTION TABLE
in order for this device to operate.
1
2
3
4
5
6
7
8
SS
, device operation will be
User Configurable Chip
Select
User Configurable Chip
Select
Non-Configurable Chip
Select.
This pin must be hard-
wired to logical 1 state
(V
undefined with this pin
left floating or held to
logical 0 (V
Ground
Serial Data
Serial Clock
Write-Protect Input
+1.7 to 5.5V (24AA1025)
+2.5 to 5.5V (24LC1025)
+1.8 to 5.5V (24FC1025)
CC
). Operation will be
24AA1025/24LC1025/24FC1025
Function
SS
Table
).
2-1.
2.3
This is a bidirectional pin used to transfer addresses
and data into and data out of the device. It is an open-
drain terminal, therefore, the SDA bus requires a pull-
up resistor to V
400 kHz and 1 MHz).
For normal data transfer SDA is allowed to change only
during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
2.4
This input is used to synchronize the data transfer from
and to the device.
2.5
This pin must be connected to either V
to V
write operations are inhibited, but read operations are
not affected.
SS
, write operations are enabled. If tied to V
Serial Data (SDA)
Serial Clock (SCL)
Write-Protect (WP)
CC
(typical 10 k for 100 kHz, 2 kfor
DS21941H-page 5
SS
or V
CC
. If tied
CC
,

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