TWR-K60D100M Freescale Semiconductor, TWR-K60D100M Datasheet - Page 9

• Manufacturer Part Number: TWR-K60D100M
• Description: Development Boards & Kits - ARM K60D 100MHZ TWR MCU MODU
• Manufacturer: Freescale Semiconductor

Specifications of TWR-K60D100M

• Rohs: yes
• Product: Development Platforms
• Tool Is For Evaluation Of: MK60DN512VMD10
• Core: ARM Cortex M4
• Interface Type: USB
• Operating Supply Voltage: 1.71 V to 3.6 V
• For Use With: Freescale Tower Systems

Additionally, the RTC_WAKEUP signal from the K60 was connected to the JM60 to demonstrate the
feature where the RTC can set an alarm and assert the RTC_WAKEUP signal to external circuitry so the
external circuitry can apply MCU VDD.
2.4 Debug Interface
There are two debug interface options provided: the on‐board OSJTAG circuit and an external Cortex
Debug+ETM connector.
2.4.1 OSJTAG
An on‐board MC9S08JM60 based Open Source JTAG (OSJTAG) circuit provides a JTAG debug interface
to the K60D100M. A standard USB A male to Mini‐B male cable (provided) can be used for debugging
via the USB connector, J16. The OSJTAG interface also provides a USB to serial bridge. Drivers for the
OSJTAG interface are provided in the P&E Micro OSBDM/OSJTAG Tower Toolkit. These drivers and
more utilities can be found online at http://www.pemicro.com/osbdm.
Note: The port pins connected to the OSJTAG USB‐to‐serial bridge (PTD6 and PTD7) are also connected
to the infrared interface. Refer to Table 6 “I/O Connectors and Pin Usage Table” and Table 5 “TWR‐
K60D100M Jumper Table” for more information.
2.4.2 Cortex Debug+ETM Connector
The Cortex Debug+ETM connector is a 20‐pin (0.05") connector providing access to the SWD, SWV,
JTAG, cJTAG, EzPort and ETM trace (4‐bit) signals available on the K60 device. The pinout and K60 pin
connections to the debug connector, J16, is shown in Table 1.
TWRK60D100MUM TWR‐K60N512 Tower Module User's Manual
Pin
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
VTref
TMS / SWDIO
GND
TCK / SWCLK
GND
TDO / SWO
Key
TDI
GNDDetect
nRESET
Target Power
TRACECLK
Target Power
TRACEDATA[0]
GND
TRACEDATA[1]
GND
TRACEDATA[2]
Function
Table 1. Cortex Debug+ETM Connector Pinout
3.3V MCU supply (P3V3_MCU)
PTA3/SCI0_RTS_b/FTM0_CH0/JTAG_MS/SWD_DIO
GND
PTA0/SCI0_CTS_b/FTM0_CH5/JTAG_CLK/SWD_CLK/EZP_CLK
GND
PTA2/SCI0_TX/FTM0_CH7/JTAG_DO/TRACE_SWO/EZP_DO
―
PTA1/SCI0_RX/FTM0_CH6/JTAG_DI/EZP_DI
PTA4/FTM0_CH1/MS/NMI_b/EZP_CS_b
RESET_b
5V supply (via J12)
PTA6/FTM0_CH3/TRACE_CLKOUT
5V supply (via J12)
PTA10/FTM2_CH0/FTM2_QD_PHA/TRACE_D0
GND
PTA9/FTM1_CH1/FTM1_QD_PHB/TRACE_D1
GND
PTA8/FTM1_CH0/FTM1_QD_PHA/TRACE_D2
TWR‐K60D100M Connection
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