VS-ST280S04P0V Vishay Semiconductors, VS-ST280S04P0V Datasheet - Page 2
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VS-ST280S04P0V
Manufacturer Part Number
VS-ST280S04P0V
Description
SCRs 400 Volt 280 Amp
Manufacturer
Vishay Semiconductors
Datasheet
1.VS-ST280S04P0V.pdf
(8 pages)
Specifications of VS-ST280S04P0V
Product Category
SCRs
Breakover Current Ibo Max
8220 A
Rated Repetitive Off-state Voltage Vdrm
400 V
Off-state Leakage Current @ Vdrm Idrm
30 mA
Forward Voltage Drop
1.28 V
Gate Trigger Voltage (vgt)
3 V
Maximum Gate Peak Inverse Voltage
5 V
Gate Trigger Current (igt)
150 mA
Holding Current (ih Max)
600 mA
Mounting Style
Stud
Package / Case
TO-93
Factory Pack Quantity
12
ST280SPbF Series
Vishay High Power Products
www.vishay.com
2
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at case temperature
Maximum RMS on-state current
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Maximum (typical) latching current
SWITCHING
PARAMETER
Maximum non-repetitive rate of rise
of turned-on current
Typical delay time
Typical turn-off time
BLOCKING
PARAMETER
Maximum critical rate of rise
of off-state voltage
Maximum peak reverse and
off-state leakage current
2
2
t for fusing
√t for fusing
For technical questions, contact: ind-modules@vishay.com
SYMBOL
SYMBOL
SYMBOL
V
V
I
T(RMS)
dV/dt
I
I
dI/dt
I
I
T(TO)1
T(TO)2
V
RRM,
T(AV)
I
DRM
TSM
Phase Control Thyristors
I
2
r
r
t
t
I
I
2
TM
t1
t2
H
d
q
√t
L
t
(Stud Version), 280 A
Gate drive 20 V, 20 Ω, t
T
Gate current 1 A, dI
V
I
V
T
T
180° conduction, half sine wave
DC at 75 °C case temperature
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x π x I
(I > π x I
(16.7 % x π x I
(I > π x I
I
T
TM
pk
J
J
d
R
J
J
= T
= 0.67 % V
= T
= T
= 25 °C, anode supply 12 V resistive load
= 880 A, T
= 50 V, dV/dt = 20 V/µs, gate 0 V 100 Ω, t
= 300 A, T
J
J
J
maximum linear to 80 % rated V
maximum, anode voltage ≤ 80 % V
maximum, rated V
T(AV)
T(AV)
), T
), T
J
DRM
J
No voltage
reapplied
100 % V
reapplied
No voltage
reapplied
100 % V
reapplied
T(AV)
T(AV)
= T
= T
J
J
TEST CONDITIONS
TEST CONDITIONS
TEST CONDITIONS
= T
= T
, T
J
J
< I < π x I
< I < π x I
g
maximum, t
J
maximum, dI/dt = 20 A/µs,
/dt = 1 A/µs
J
J
= 25 °C
maximum
maximum
RRM
RRM
r
≤ 1 µs
DRM
T(AV)
T(AV)
Sinusoidal half wave,
initial T
/V
p
RRM
= 10 ms sine pulse
), T
), T
applied
J
J
J
= T
= T
= T
DRM
J
J
J
DRM
maximum
maximum
maximum
p
= 500 µs
Document Number: 94402
1000 (300)
VALUES
VALUES
VALUES
Revision: 11-Aug-08
7850
8220
6600
6900
3100
1000
0.84
0.88
0.50
0.47
1.28
280
440
310
220
218
200
600
100
500
1.0
85
30
UNITS
UNITS
kA
UNITS
kA
A/µs
V/µs
mΩ
mA
°C
mA
µs
A
A
V
V
2
2
√s
s