uVGA-III 4D Systems, uVGA-III Datasheet - Page 7
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uVGA-III
Manufacturer Part Number
uVGA-III
Description
Display Development Tools Tiny VGA Graph Cont for QVGA/VGA/WVGA
Manufacturer
4D Systems
Datasheet
1.UVGA-III.pdf
(18 pages)
Specifications of uVGA-III
Rohs
yes
Product
Development Modules
Tool Is For Evaluation Of
PICASO-GFX2
Interface Type
I2C, SDMicro
Operating Supply Voltage
4 V to 5.5 V
Dimensions
63 mm x 39 mm x 21.5 mm
Maximum Operating Temperature
+ 65 C
Minimum Operating Temperature
- 15 C
4D SYSTEMS
4. Hardware Interface - Pins
The μVGA-III provides both a hardware and
software interface. This section describes in detail
the hardware interface pins of the device.
4.1.
The μVGA-III has two dedicated hardware
Asynchronous
communicate with external serial devices. These
are referred to as the COM0 and the COM1 serial
ports.
The primary features are:
•
•
•
•
A single byte serial transmission consists of the
start bit, 8-bits of data followed by the stop bit.
The start bit is always 0, while a stop bit is always
1. The LSB (Least Significant Bit, Bit 0) is sent out
first following the start bit. Figure below shows a
single byte transmission timing diagram.
COM0 is also the primary interface for 4DGL user
program downloads and chip configuration (PmmC
programming).
application
downloaded and the user code starts executing,
the serial port is then available to the user
application. Refer to Section 5. ‘Firmware / PmmC
Programming’ for more details on this subject.
© 2012 4D SYSTEMS
reception.
600K baud.
Single byte transmits and receives or a fully
buffered service. The buffered service feature
runs in the background capturing and
buffering serial data without the user
application having to constantly poll any of the
serial ports. This frees up the application to
service other tasks.
Serial Ports - COM0, COM1 UARTS
Full-Duplex 8 bit data transmission and
Data format: 8 bits, No Parity, 1 Stop bit.
Independent Baud rates from 300 baud up to
program
Serial
Once
UART
the
(EVE
ports
compiled
byte-code)
that
4DGL
Page 7 of 18
can
is
TX0 pin (Serial Transmit COM0):
Asynchronous Serial port COM0 transmit pin, TX0.
Connect this pin to external serial device receive
(Rx) signal. This pin is 5.0V tolerant.
RX0 pin (Serial Receive COM0):
Asynchronous Serial port COM0 receive pin, RX0.
Connect this pin to external serial device transmit
(Tx) signal. This pin is 5.0V tolerant.
TX1 pin (Serial Transmit COM1):
Asynchronous Serial port COM1 transmit pin, TX1.
Connect this pin to external serial device receive
(Rx) signal. This pin is 5.0V tolerant.
RX1 pin (Serial Receive COM1):
Asynchronous Serial port COM1 receive pin, RX1.
Connect this pin to external serial device transmit
(Tx) signal. This pin is 5.0V tolerant.
4.2.
There are 13 general purpose Input/Output (GPIO)
pins available to the user. These are grouped as
IO1..IO5 (Note for IO1, IO2 and IO3 below) and
BUS0..BUS7. Power-Up Reset default is all INPUTS.
The 5 I/O pins (IO1..IO5), provide flexibility of
individual bit operations while the 8 pins
(BUS0..BUS7),
collectively for byte wise operations. The IO4 and
IO5 also act as strobing signals to control the GPIO
Bus. GPIO Bus can be read or written by strobing a
low pulse (50ns duration or greater) the
IO4/BUS_RD or IO5/BUS_WR for read or write
respectively. For detailed usage refer to the
separate document titled:
“PICASO-4DGL-Internal-Functions.pdf”
IO1-IO5 pins (excluding IO3) (2 x GPIO pins):
General purpose I/O pins. Each pin can be
individually set for INPUT or an OUTPUT.
IO3 pins (Peripheral Supply pin):
IO3 is controllable via the processor, or via the H2
Interface pin driven by an external circuit. If IO3 is
set as OUTPUT and driven HIGH the uSD and VGA
output are enabled, and disabled when driven LO.
Set as INPUT to use an external circuit to drive this
pin.
IO4/BUS_RD pin (GPIO IO4 or BUS_RD pin):
General Purpose IO4 pin. Also used for BUS_RD
signal to read and latch the data in to the parallel
GPIO BUS0..BUS7.
General Purpose I/O
known
www.4dsystems.com.au
as
GPIO
BUS,
µVGA-III
serve