EV-ADF4156SD1Z Analog Devices, EV-ADF4156SD1Z Datasheet - Page 4
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EV-ADF4156SD1Z
Manufacturer Part Number
EV-ADF4156SD1Z
Description
Clock & Timer Development Tools PLL EB (No filter or VCO)
Manufacturer
Analog Devices
Type
PLL Synthesizers / Multipliers / Dividersr
Datasheet
1.EV-ADF4156SD1Z.pdf
(24 pages)
Specifications of EV-ADF4156SD1Z
Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
ADF4156
Frequency
6.2 GHz
Operating Supply Voltage
6 V to 12 V
Operating Supply Current
26 mA
Factory Pack Quantity
1
For Use With
EVAL-SDP-CS1Z
EVALUATION BOARD HARDWARE
The evaluation board requires the use of an SDP-S mother-
board to program the device. This is not included and must be
purchased separately. The
shown in Figure 21 to Figure 23.
POWER SUPPLIES
The board is powered from external banana connectors. The
voltage can vary between 6 V and 12 V. The power supply
circuit provides 3.0 V to V
ADF4156
either 3.0 V or 5 V for the
3.0 V for the
that V
External power supplies can be used to directly drive the device.
In this case, the user must insert SMA connectors as shown in
Figure 2.
INPUT SIGNALS
The necessary reference input comes from the on-board TCXO.
Alternatively, this can be sourced from an external generator. A
low noise, high slew rate reference source is best for achieving
the stated performance of the ADF4156. This can be connected
to Connector J11. If preferred, the edge mount connector, J5,
can be inserted and used instead. To use this option, it is
necessary to remove R16 and insert a 51 Ω resistor in R17.
Digital SPI signals are supplied through the SDP connector, J1.
SDP-S is the preferred platform to be used. The SDP-B can also
be used but Resistor R57 must be removed on the SDP-B board.
Some additional low frequency spurious may appear if the SDP-B
connector is used.
UG-171
DD
should never exceed 3.3 V. This can damage the device.
AV
ADF4156
DD
and DV
V
DD
DD
DD
ADF4156
EV-ADF4156SD1Z
pins) and allows the user to choose
and 5 V for the
on the board (which supplies the
V
P
. The default settings are
ADF4156
schematics are
V
P
. Note
Rev. B | Page 4 of 24
OUTPUT SIGNALS
All components necessary for LO generation are on board. The
PLL is made up of the
and the VCO. A 5.8 GHz VCO from Z-Comm is supplied with
the evaluation board. A 20 kHz low-pass filter is inserted
between the charge pump output and the VCO input. The
0.31 mA charge pump current setting is used. The VCO output
is available at RFOUT through a standard SMA connector, J2.
The MUXOUT signal can be monitored at Test Point T8 or at
SMA Connector J3.
Figure 2. Evaluation Board Silkscreen
Evaluation Board User Guide
ADF4156
synthesizer, a passive loop filter,