AT45DB011D-MH-T Atmel, AT45DB011D-MH-T Datasheet - Page 11

• Manufacturer Part Number: AT45DB011D-MH-T
• Description: IC FLASH 1MBIT 66MHZ 8UDFN
• Manufacturer: Atmel

Specifications of AT45DB011D-MH-T

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 1M (512 pages x 264 bytes)
• Speed: 66MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-UDFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.8
8. Sector Protection
3639H–DFLASH–04/09
Main Memory Page Program Through Buffer
This operation is a combination of the Buffer Write and Buffer to Main Memory Page Program
with Built-in Erase operations. Data is first clocked into the buffer from the input pin (SI) and then
programmed into a specified page in the main memory. To perform a main memory page pro-
gram through buffer for the DataFlash standard page size (264 bytes), a 1-byte opcode, 82H,
must first be clocked into the device, followed by three address bytes. The address bytes are
comprised of 6 don’t care bits, 9 page address bits, (PA8 - PA0) that select the page in the main
memory where data is to be written, and 9 buffer address bits (BFA8 - BFA0) that select the first
byte in the buffer to be written. To perform a main memory page program through buffer for the
binary page size (256 bytes), the opcode 82H must be clocked into the device followed by three
address bytes consisting of 7 don’t care bits, 9 page address bits (A16 - A8) that specify the
page in the main memory to be written, and 8 buffer address bits (BFA7 - BFA0) that selects the
first byte in the buffer to be written. After all address bytes are clocked in, the part will take data
from the input pins and store it in the specified data buffer. If the end of the buffer is reached, the
device will wrap around back to the beginning of the buffer. When there is a low-to-high transi-
tion on the CS pin, the part will first erase the selected page in main memory to all 1s and then
program the data stored in the buffer into that memory page. Both the erase and the program-
ming of the page are internally self-timed and should take place in a maximum time of t
During this time, the status register will indicate that the part is busy.
Two protection methods, hardware and software controlled, are provided for protection against
inadvertent or erroneous program and erase cycles. The software controlled method relies on
the use of software commands to enable and disable sector protection while the hardware con-
trolled method employs the use of the Write Protect (WP) pin. The selection of which sectors
that are to be protected or unprotected against program and erase operations is specified in the
nonvolatile Sector Protection Register. The status of whether or not sector protection has been
enabled or disabled by either the software or the hardware controlled methods can be deter-
mined by checking the Status Register.
EP
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