93LC66C-I/ST Microchip Technology, 93LC66C-I/ST Datasheet - Page 10
![IC EEPROM 4KBIT 3MHZ 8TSSOP](/photos/6/59/65937/c04-086_st_sml.jpg)
93LC66C-I/ST
Manufacturer Part Number
93LC66C-I/ST
Description
IC EEPROM 4KBIT 3MHZ 8TSSOP
Manufacturer
Microchip Technology
Specifications of 93LC66C-I/ST
Memory Size
4K (512 x 8 or 256 x 16)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
3MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-TSSOP
Memory Configuration
512 X 8 / 256 X 16
Ic Interface Type
Microwire
Clock Frequency
3MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
TSSOP
No. Of Pins
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
falling edge of CS initiates the self-timed auto-erase and
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.8
The WRITE instruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA66A/B/C and 93LC66A/B/C
devices, after the last data bit is clocked into DI, the
programming cycle. For 93C66A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
FIGURE 2-8:
FIGURE 2-9:
DS21795D-page 10
CLK
CLK
DO
DO
CS
CS
DI
DI
Write
1
1
High-Z
High-Z
WRITE TIMING FOR 93AA AND 93LC DEVICES
WRITE TIMING FOR 93C DEVICES
0
0
1
1
A
A
N
N
•••
•••
A0
A0
Dx
Dx
•••
•••
The DO pin indicates the Ready/
device, if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
D0
D0
Note:
T
T
CSL
CSL
CSL
). DO at logical ‘0’ indicates that programming
T
WC
T
Issuing a Start bit and then taking CS low
will clear the Ready/
WC
Busy
Busy
T
T
SV
SV
© 2008 Microchip Technology Inc.
Ready
Ready
Busy
Busy
status from DO.
High-Z
High-Z
status of the
T
T
CZ
CZ