MAX6320PUK30DZ+T Maxim Integrated, MAX6320PUK30DZ+T Datasheet - Page 11

• Manufacturer Part Number: MAX6320PUK30DZ+T
• Description: Supervisory Circuits
• Manufacturer: Maxim Integrated
• Series: MAX6316, MAX6316M, MAX6317, MAX6318, MAX6319, MAX6320, MAX6321, MAX6322r

Specifications of MAX6320PUK30DZ+T

• Number Of Voltages Monitored: 1
• Monitored Voltage: 1 V to 5.5 V
• Undervoltage Threshold: 2.955 V
• Overvoltage Threshold: 3.045 V
• Output Type: Active Low, Open Drain
• Manual Reset: Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 1600 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23
• Chip Enable Signals: No
• Maximum Power Dissipation: 571 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Supply Current (typ): 10 uA
• Supply Voltage - Min: 1 V

Maxim Integrated
Figure 1. Transmitter Propagation-Delay Timing
Figure 3. Receiver-Output Enable and Disable Timing
INPUT
OUTPUT
b) ENABLE TIMING
c) DISABLE TIMING
a) TEST CIRCUIT
t
PLHT
+3V
RECEIVER
OUTPUTS
RECEIVER
OUTPUTS
EN INPUT
EN INPUT
R
V
X
V
EN
OH
OL
IN
+3V
0V
R
X
R
X
0V
OUT
150pF
+3V
0V
1kΩ
+5V-Powered, Multichannel RS-232
OUTPUT DISABLE TIME (t
OUTPUT ENABLE TIME (t
V
V
+3.5V
+0.8V
OH
OL
+ 0.5V
- 0.5V
EN
EN
V
V
CC
CC
- 2V
- 2V
t
PHLT
ER
DR
V+
0V
V-
)
)
Figure 2. Receiver Propagation-Delay Timing
Figure 4. Transmitter-Output Disable Timing
OUTPUT
*EXCEPT FOR R2 ON THE MAX243
INPUT
WHERE -3V IS USED.
t
t
PHLR
PHLS
Test Circuits/Timing Diagrams
SHDN
1 OR 0
b) TEST CIRCUIT
a) TIMING DIAGRAM
V+
V-
0V*
MAX220–MAX249
MAX220–MAX249
Drivers/Receivers
+3V
T
X
50%
50%
+3V
0V
3kΩ
+5V
-5V
OUTPUT DISABLE TIME (t
50pF
0V
50%
50%
GND
t
t
DT
PLHR
PLHS
)
V
CC
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