93C46B/ST Microchip Technology, 93C46B/ST Datasheet - Page 9
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93C46B/ST
Manufacturer Part Number
93C46B/ST
Description
IC EEPROM 1KBIT 2MHZ 8TSSOP
Manufacturer
Microchip Technology
Specifications of 93C46B/ST
Memory Size
1K (64 x 16)
Package / Case
8-TSSOP
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Organization
64 K x 16
Interface Type
2-Wire
Maximum Clock Frequency
2 MHz
Access Time
6 ms
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
1.5 mA
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
93C46B/ST
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.8
The WRITE instruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA46A/B/C and 93LC46A/B/
C devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase
and programming cycle. For 93C46A/B/C devices, the
self-timed auto-erase and programming cycle is
initiated by the rising edge of CLK on the last data bit.
FIGURE 2-8:
FIGURE 2-9:
2003 Microchip Technology Inc.
CLK
CLK
CS
DO
CS
DO
DI
DI
WRITE
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
1
1
HIGH-Z
HIGH-Z
WRITE TIMING FOR 93AA AND 93LC DEVICES
WRITE TIMING FOR 93C DEVICES
0
0
1
1
An
An
•••
•••
A0
A0
Dx
Dx
•••
•••
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
Note:
D0
D0
CSL
T
T
CSL
CSL
). DO at logical ‘0’ indicates that programming
Twc
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
Twc
BUSY
BUSY
T
T
SV
SV
READY
READY
DS21749D-page 9
HIGH-Z
HIGH-Z
T
T
CZ
CZ