NAND32GW3F4AN6E NUMONYX, NAND32GW3F4AN6E Datasheet
NAND32GW3F4AN6E
Specifications of NAND32GW3F4AN6E
Related parts for NAND32GW3F4AN6E
NAND32GW3F4AN6E Summary of contents
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... OTP area – Serial number (unique ID) Development tools – Error correction code models – Bad block management and wear leveling algorithm – HW simulation models Data integrity – 100,000 program/erase cycles (with ECC) – 10 years data retention RoHS compliant packages Rev 4 1/17 www.numonyx.com 1 ...
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... Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Memory array organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.1 Bad blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 Parallel operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 Inputs/outputs (I/O0-I/O7 3.2 Address Latch Enable (AL 3.3 Command Latch Enable (CL 3.4 Chip Enable (E 3.5 Read Enable ( 3.6 Write Enable ( 3.7 Write Protect (WP 3.8 Ready/Busy (RB 3.9 V supply voltage ...
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NAND32GW3F4A List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... The device is available in TSOP48 (12 × 20 mm) package and is shipped from the factory with block 0 always valid and the memory content bits, in valid blocks, erased to ‘1’. Refer to Table 8: Ordering information scheme Table 1 ...
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... Description Figure 1. Functional block diagram 6/ 16-Gbit flash memory 16-Gbit flash memory V SS NAND32GW3F4A RB 1 I/O0-I/ NI3078 ...
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NAND32GW3F4A Figure 2. Logic diagram Table 2. Signal names Signal I/ ...
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Description Figure 3. TSOP48 connections 8/ RB2 RB1 NAND flash ...
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... NAND32GW3F4A 2 Memory array organization The memory array is split into two dice. Each dice is comprised of NAND structures where 32 cells are connected in series. The array is organized into blocks, where each block contains 64 pages. The array is split into two areas: the main area and the spare area. The main area of the array stores data, whereas the spare area typically stores software flags or bad block identification ...
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... When CL is High, the inputs are latched on the rising edge of Write Enable. 3.4 Chip Enable (E The Chip Enable input activates the memory control logic, input buffers, decoders and sense amplifiers. When Chip Enable is Low, V High while the device is busy, the device remains selected and does not go into IH standby mode ...
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... V supply voltage DD V provides the power supply to the internal core of the memory device the main DD power supply for operations (read, program, and erase). An internal voltage detector disables all functions whenever V device from any involuntary program/erase during power-transitions. Each device in a system should have V widths should be sufficient to carry the required program and erase currents ...
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Maximum ratings 4 Maximum ratings Stressing the device above the ratings listed in cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the ...
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NAND32GW3F4A 5 DC and AC parameters This section summarizes the operating and measurement conditions as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristics tables are derived from tests performed ...
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... Package mechanical 6 Package mechanical To meet environmental requirements, Numonyx offers these devices in RoHS compliant packages, which have a lead-free second-level interconnect. The category of second-level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...
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... F = RoHS compliant package, tape and reel packing Note: Devices are shipped from the factory with the memory content bits, in valid blocks, erased to ‘1’. For further information on any aspect of this device, please contact your nearest Numonyx sales office. Ordering information NAND32G ...
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Revision history 8 Revision history Table 9. Document revision history Date 05-Nov-2008 02-Jul-2009 06-Oct-2009 25-Nov-2009 16/17 Revision 1 Initial release. References to ECOPACK removed and replaced by RoHS 2 compliance. Added security features on the cover page. Minor text changes. ...
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... NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems nuclear facility Numonyx may make changes to specifications and product descriptions at any time, without notice. ...