HYB25D512160CE-5 Qimonda, HYB25D512160CE-5 Datasheet - Page 19

• Manufacturer Part Number: HYB25D512160CE-5
• Description: IC DDR SDRAM 512MBIT 66TSOP
• Manufacturer: Qimonda

Specifications of HYB25D512160CE-5

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 66-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 675-1010-2

3.1.1
Accesses within a given burst may be programmed to be either sequential or interleaved; this is referred to as the burst type
and is selected via bit A3. The ordering of accesses within a burst is determined by the burst length, the burst type and the
starting column address, as shown in
Notes
1. For a burst length of two, A1-Ai selects the two-data-element block; A0 selects the first access within the block.
2. For a burst length of four, A2-Ai selects the four-data-element block; A0-A1 selects the first access within the block.
3. For a burst length of eight, A3-Ai selects the eight-data- element block; A0-A2 selects the first access within the block.
4. Whenever a boundary of the block is reached within a given sequence above, the following access wraps within the block.
Rev. 1.41, 2007-12
03292006-3TFJ-HNV3
Burst Length
2
4
8
A2
0
0
0
0
1
1
1
1
Starting Column Address
Burst Type
A1
0
0
1
1
0
0
1
1
0
0
1
1
Table
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
11.
Type = Sequential
0-1
1-0
0-1-2-3
1-2-3-0
2-3-0-1
3-0-1-2
0-1-2-3-4-5-6-7
1-2-3-4-5-6-7-0
2-3-4-5-6-7-0-1
3-4-5-6-7-0-1-2
4-5-6-7-0-1-2-3
5-6-7-0-1-2-3-4
6-7-0-1-2-3-4-5
7-0-1-2-3-4-5-6
Date: 2007-12-13
19
Order of Accesses Within a Burst
HY[B/I]25D512[40/80/16]0C[C/E/F/T](L)
512-Mbit Double-Data-Rate SDRAM
Type = Interleaved
0-1
1-0
0-1-2-3
1-0-3-2
2-3-0-1
3-2-1-0
0-1-2-3-4-5-6-7
1-0-3-2-5-4-7-6
2-3-0-1-6-7-4-5
3-2-1-0-7-6-5-4
4-5-6-7-0-1-2-3
5-4-7-6-1-0-3-2
6-7-4-5-2-3-0-1
7-6-5-4-3-2-1-0
Internet Data Sheet
Burst Definition
TABLE 11