CY7C1354C-200AXI Cypress Semiconductor Corp, CY7C1354C-200AXI Datasheet - Page 11
![IC SRAM 9MBIT 200MHZ 100LQFP](/photos/6/76/67624/428-100-tqfp_14x20x1_4_sml.jpg)
CY7C1354C-200AXI
Manufacturer Part Number
CY7C1354C-200AXI
Description
IC SRAM 9MBIT 200MHZ 100LQFP
Manufacturer
Cypress Semiconductor Corp
Type
Synchronousr
Datasheet
1.CY7C1354C-166AXC.pdf
(32 pages)
Specifications of CY7C1354C-200AXI
Memory Size
9M (256K x 36)
Package / Case
100-LQFP
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Speed
200MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Access Time
3.2 ns
Maximum Clock Frequency
200 MHz
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3.135 V
Maximum Operating Current
220 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
4
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1354C-200AXI
Manufacturer:
Cypress Semiconductor
Quantity:
135
Company:
Part Number:
CY7C1354C-200AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C1354C-200AXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Partial Write Cycle Description
The following table lists the Partial Write Cycle Description for CY7C1356C.
Document Number: 38-05538 Rev. *L
Read
Write – no bytes written
Write byte a − (DQ
Write byte b – (DQ
Write both bytes
Notes
10. X = “Don't Care”, H = Logic HIGH, L = Logic LOW, CE stands for all chip enables active. BWx = L signifies at least one bytewrite select is active, BWx = valid signifies
11. Write is defined by WE and BWX. See Write Cycle Description table for details.
12. When a write cycle is detected, all I/Os are tri-stated, even during byte writes.
13. Table only lists a partial listing of the byte write combinations. Any combination of BW
that the desired byte write selects are asserted, see Write Cycle Description table for details.
a
b
and DQP
and DQP
Function (CY7C1356C)
a)
b)
X
is valid. Appropriate write will be done based on which byte write is active.
[10, 11, 12, 13]
WE
H
L
L
L
L
CY7C1354C, CY7C1356C
BW
H
H
x
L
L
b
BW
H
H
x
L
L
Page 11 of 32
a
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