CY7C1325G-133AXC Cypress Semiconductor Corp, CY7C1325G-133AXC Datasheet
CY7C1325G-133AXC
Specifications of CY7C1325G-133AXC
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CY7C1325G-133AXC Summary of contents
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... Subsequent burst addresses can be internally generated as controlled by the advance pin (ADV). The CY7C1325G operates from a +3.3 V core power supply while all outputs may operate with either a +2.5 or +3.3 V supply. All inputs JESD8-5-compatible ...
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... Document Number: 38-05518 Rev. *H Electrical Characteristics ............................................... 10 Capacitance .................................................................... 11 Thermal Resistance ........................................................ 11 Switching Characteristics .............................................. 12 Timing Diagrams ............................................................ 13 Ordering Information ...................................................... 17 Ordering Code Definitions ......................................... 17 Package Diagrams .......................................................... 18 Acronyms ........................................................................ 19 Document Conventions ................................................. 19 Units of Measure ....................................................... 19 Document History Page ................................................. 20 Sales, Solutions, and Legal Information ...................... 21 Worldwide Sales and Design Support ....................... 21 Products .................................................................... 21 PSoC Solutions ......................................................... 21 CY7C1325G Page [+] Feedback ...
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... Maximum operating current Maximum standby current Pin Configurations DDQ DDQ BYTE DDQ DQP DDQ Document Number: 38-05518 Rev. *H 133 MHz 6.5 225 40 Figure 1. 100-pin TQFP Pinout CY7C1325G CY7C1325G 100 MHz Unit 8.0 ns 205 DDQ DQP DDQ BYTE DDQ DDQ Page [+] Feedback ...
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... V CLK BWE DQP MODE NC/36M Description to select/deselect the device. ADSP is ignored select/deselect the device sampled only when a new external address select/deselect the device sampled only when a new external address 2 3 CY7C1325G DDQ NC/576M NC/1G DQP DDQ DDQ DDQ DDQ , CE , and CE are sampled active. ...
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... NC/18M, NC/288M, NC/576M and NC/1G are address expansion pins that are not internally connected to NC/36M, the die. NC/72M, NC/144M, NC/288M, NC/576M, NC/1G Document Number: 38-05518 Rev. *H Description is deasserted HIGH. 1 are placed in a tristate condition. [A:B] CY7C1325G [1:0] [1:0] or left DD Page [+] Feedback ...
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... OE. Burst Sequences The CY7C1325G provides an on-chip two bit wraparound burst counter inside the SRAM. The burst counter is fed by A are all asserted 3 can follow either a linear or interleaved burst order. The burst order is determined by the state of the MODE input. A LOW on MODE selects a linear burst sequence ...
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... ZZ inactive to exit sleep current RZZI Document Number: 38-05518 Rev. *H Fourth Address A1 Fourth Address Test Conditions – 0 > > V – 0 < 0.2 V This parameter is sampled This parameter is sampled CY7C1325G Min Max Unit – – CYC 2t – ns CYC – CYC 0 – ns Page [+] Feedback ...
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... Truth Table The Truth Table for part CY7C1325G is as follows. Address Cycle Description Used Deselected cycle, None power-down Deselected cycle, None power-down Deselected cycle, None power-down Deselected cycle, None power-down Deselected cycle, None power-down Sleep mode, power-down None Read cycle, begin burst ...
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... Truth Table for Read/Write The Truth Table for Read/Write for part CY7C1325G is as follows. Function Read Read Write byte A – (DQ and DQP ) A A Write byte B – (DQ and DQP ) B B Write all bytes Write all bytes Note “Don’t Care.” Logic HIGH Logic LOW. ...
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... OUT = 1/t MAX CYC 10 ns cycle, 100 MHz /2), undershoot: V (AC) > –2 V (Pulse width less than t CYC IL (min) within 200 ms. During this time V < V and CY7C1325G Ambient DDQ Temperature 3.3 V5% / 2.5 V – 10 –40 °C to +85 °C Test Description Typ ...
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... Package Figure 3. AC Test Loads and Waveforms R = 317 3 DDQ GND 351 INCLUDING JIG AND SCOPE ( 1667 2 DDQ GND 1538 INCLUDING JIG AND (b) SCOPE CY7C1325G Min Max Unit – – – – – – 119-ball BGA Unit Max ...
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... V Figure 3 on page 11. Transition is measured ± 200 mV from steady-state voltage. and t is less than t to eliminate bus contention between SRAMs when sharing the same data bus. OELZ CHZ CLZ CY7C1325G –133 –100 Unit Min Max Min Max 1 – ...
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... ADVS ADVH ADV suspends burst t CDV t OELZ t DOH Q(A2 BURST READ DON’T CARE UNDEFINED is HIGH and CE is LOW. When CE is HIGH CY7C1325G Deselect Cycle t CHZ Q( Q(A2 Burst wraps around to its initial state is HIGH LOW HIGH Page [+] Feedback ...
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... WES WEH ADV suspends burst D(A2 BURST WRITE DON’T CARE UNDEFINED is HIGH and CE is LOW. When CE is HIGH LOW. [A:B] CY7C1325G t ADS t ADH A3 t WES t WEH t ADVS t ADVH D( D(A3 Extended BURST WRITE is HIGH LOW HIGH Page [+] Feedback ...
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... Document Number: 38-05518 Rev. *H [20, 21, 22] Figure 6. Read/Write Timing WEH WES OELZ D(A3) t CDV Q(A4) Q(A4+1) Single WRITE BURST READ DON’T CARE UNDEFINED is HIGH and CE is LOW. When CE is HIGH CY7C1325G A5 A6 D(A5) D(A6) Q(A4+2) Q(A4+3) Back-to-Back WRITEs is HIGH LOW HIGH Page [+] Feedback ...
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... Device must be deselected when entering ZZ mode. See Cycle Descriptions table for all possible signal conditions to deselect the device. 24. DQs are in High Z when exiting ZZ sleep mode. Document Number: 38-05518 Rev. *H [23, 24] Figure 7. ZZ Mode Timing DDZZ High-Z DON’T CARE CY7C1325G t ZZREC t RZZI DESELECT or READ Only Page [+] Feedback ...
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... Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives and distributors. To find the office http://www.cypress.com/go/datasheet/offices closest to you, visit us at Speed Package (MHz) Ordering Code Diagram 133 CY7C1325G-133AXC 51-85050 100-pin Thin Quad Flat Pack (14 × 20 × 1.4 mm) Pb-free Ordering Code Definitions CY 7C 1325 G - 133 AX C Document Number: 38-05518 Rev. *H www ...
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... Package Diagrams Figure 8. 100-pin TQFP (14 × 20 × 1.4 mm), 51-85050 Figure 9. 119-ball BGA (14 × 22 × 2.4 mm), 51-85115 Document Number: 38-05518 Rev. *H CY7C1325G 51-85050 *D 51-85115 *C Page [+] Feedback ...
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... WE write enable Document Number: 38-05518 Rev. *H Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes mm milli meter ms milli seconds MHz Mega Hertz pF pico Farad W Watts °C degree Celcius CY7C1325G Page [+] Feedback ...
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... Document History Page Document Title: CY7C1325G, 4-Mbit (256 K × 18) Flow through Sync SRAM Document Number: 38-05518 Orig. of Submission Revision ECN Change Date ** 224366 RKF See ECN *A 283775 VBL See ECN *B 333626 SYT See ECN *C 418633 RXU See ECN *D 480124 VKN See ECN ...
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... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 38-05518 Rev. *H All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised March 29, 2011 CY7C1325G PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...