M27C4001-12F1 STMicroelectronics, M27C4001-12F1 Datasheet - Page 8
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M27C4001-12F1
Manufacturer Part Number
M27C4001-12F1
Description
IC EPROM 4MBIT 120NS 32CDIP
Manufacturer
STMicroelectronics
Specifications of M27C4001-12F1
Format - Memory
EPROMs
Memory Type
UV EPROM
Memory Size
4M (512K x 8)
Speed
120ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
32-CDIP (0.600", 15.24mm) Window
Capacitance, Input
6 pF
Capacitance, Output
12 pF
Current, Input, Leakage
±10 μA (Read)
Current, Operating
30 mA (Read)
Current, Output, Leakage
±10 μA (Read)
Current, Supply
30 mA
Density
4M
Organization
512K×8
Package Type
FDIP32W
Temperature, Operating
0 to +70 °C
Temperature, Operating, Maximum
70 °C
Temperature, Operating, Minimum
0 °C
Time, Access
100 ns
Time, Fall
≤20 ns
Time, Programmable
100 μs
Time, Rise
≤20 ns
Voltage, Input, High
6 V (Read)
Voltage, Input, High Level
2 V (Min.)
Voltage, Input, Low
0.8 V (Read)
Voltage, Input, Low Level
-0.3 V (Max.)
Voltage, Output, High
4.3 V (Read)
Voltage, Output, Low
0.4 V (Read)
Voltage, Programmable
11.5 V (Min.)
Voltage, Supply
5 V
Memory Configuration
512K X 8
Access Time
120ns
Supply Voltage Range
4.5V To 5V
Memory Case Style
FDIPW
No. Of Pins
32
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1661-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M27C4001-12F1
Manufacturer:
INTEL
Quantity:
1 149
Part Number:
M27C4001-12F1
Manufacturer:
ST
Quantity:
20 000
Company:
Part Number:
M27C4001-12F1L
Manufacturer:
ST
Quantity:
3 000
Part Number:
M27C4001-12F1L
Manufacturer:
ST
Quantity:
20 000
Device operation
2
2.1
2.2
2.3
8/25
Device operation
The operating modes of the M27C4001 are listed in the Operating Modes table. A single
power supply is required in the read mode. All inputs are TTL levels except for V
on A9 for Electronic Signature.
Read Mode
The M27C4001 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E) is the power control and should be used for
device selection. Output Enable (G) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
available at the output after a delay of t
been low and the addresses have been stable for at least t
Standby Mode
The M27C4001 has a standby mode which reduces the supply current from 30mA to 100 A.
The M27C4001 is placed in the standby mode by applying a CMOS high signal to the E
input. When in the standby mode, the outputs are in a high impedance state, independent of
the G input.
Two Line Output Control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while G should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
a)
b)
the lowest possible memory power dissipation,
complete assurance that output bus contention will not occur.
AVQV
) is equal to the delay from E to output (t
GLQV
from the falling edge of G, assuming that E has
AVQV
-t
GLQV
.
ELQV
). Data is
PP
M27C4001
and 12V