CY62256NLL-55ZXE Cypress Semiconductor Corp, CY62256NLL-55ZXE Datasheet

IC SRAM 256KBIT 55NS 28TSOP

CY62256NLL-55ZXE

Manufacturer Part Number
CY62256NLL-55ZXE
Description
IC SRAM 256KBIT 55NS 28TSOP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY62256NLL-55ZXE

Memory Size
256K (32K x 8)
Package / Case
28-TSOP I
Format - Memory
RAM
Memory Type
SRAM
Speed
55ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Access Time
55 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
50 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Cypress Semiconductor Corporation
Document #: 001-06511 Rev. *A
Features
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
• Temperature Ranges
• High speed: 55 ns
• Voltage range: 4.5V–5.5V operation
• Low active power
• Low standby power (LL version)
• Easy memory expansion with CE and OE features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in pb-free and non Pb-free 28-lead (600-mil)
Logic Block Diagram
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
— 275 mW (max.)
— 82.5 µW (max.)
PDIP, 28-lead (300-mil) narrow SOIC, 28-lead TSOP-I
and 28-lead Reverse TSOP-I packages
CE
WE
OE
A
A
A
A
A
A
A
A
A
10
9
8
7
6
5
4
3
2
198 Champion Court
INPUTBUFFER
32K x 8
DECODER
COLUMN
ARRA Y
Functional Description
The CY62256N is a high-performance CMOS static RAM
organized as 32K words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE) and active LOW
output enable (OE) and tri-state drivers. This device has an
automatic
consumption by 99.9% when deselected.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE and WE
inputs are both LOW, data on the eight data input/output pins
(I/O
addressed by the address present on the address pins (A
through A
the device and enabling the outputs, CE and OE active LOW,
while WE remains inactive or HIGH. Under these conditions,
the contents of the location addressed by the information on
address pins are present on the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH.
POWER
DOWN
0
through I/O
256K (32K x 8) Static RAM
14
San Jose
). Reading the device is accomplished by selecting
power-down
7
) is written into the memory location
,
CA 95134-1709
feature,
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
[1]
0
1
2
3
4
5
6
7
Revised August 3, 2006
reducing
CY62256N
408-943-2600
the
power
0
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Related parts for CY62256NLL-55ZXE

CY62256NLL-55ZXE Summary of contents

Page 1

... Note: 1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 001-06511 Rev. *A 256K (32K x 8) Static RAM Functional Description The CY62256N is a high-performance CMOS static RAM organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and tri-state drivers ...

Page 2

... Product Portfolio Product Min. CY62256NL Com’l / Ind’l 4.5 CY62256NLL Commercial CY62256NLL Industrial CY62256NLL Automotive-A CY62256NLL Automotive-E Pin Configurations DIP Top View I I/O 4 I/O 3 GND 15 14 Pin Definitions Pin Number Type 1–10, 21, 23–26 Input 11–13, 15–19, ...

Page 3

Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied..............................................-55°C to +125°C Supply Voltage to Ground Potential (Pin 28 to Pin 14) ........................................... ...

Page 4

Thermal Resistance Parameter Description Θ Thermal Resistance JA (Junction to Ambient) Θ Thermal Resistance JC (Junction to Case) AC Test Loads and Waveforms R1 1800Ω OUTPUT OUTPUT R2 100 pF 990Ω INCLUDING INCLUDING JIG AND SCOPE (a) ...

Page 5

... L 10. The internal Write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a Write and either signal can terminate a Write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the Write. ...

Page 6

Switching Waveforms (continued) [13, 14] Read Cycle No ACE OE t LZOE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT [10, 15, 16] Write Cycle No. 1 (WE Controlled) ADDRESS ...

Page 7

Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS DATA I/O NOTE 17 t HZWE Document #: 001-06511 Rev. *A [11, 16 DATA VALID IN CY62256N t ...

Page 8

Typical DC and AC Characteristics NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 1 1.0 0 25°C A 0.4 0 0.0 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) NORMALIZED ...

Page 9

Typical DC and AC Characteristics TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 SUPPLY VOLTAGE (V) Truth Table Inputs/Outputs High ...

Page 10

... CY62256NL−70SNXC CY62256NLL−70SNC CY62256NLL−70SNXC CY62256NLL−70ZC CY62256NLL−70ZXC CY62256NL–70SNI CY62256NL–70SNXI CY62256NLL−70SNI CY62256NLL−70SNXI CY62256NLL−70ZI CY62256NLL−70ZXI CY62256NLL−70ZRI CY62256NLL−70ZRXI CY62256NLL−70SNXA Please contact your local Cypress sales representative for availability of these parts Document #: 001-06511 Rev. *A ...

Page 11

Package Diagrams 14 15 0.155 0.200 0.115 0.160 0.090 0.110 Document #: 001-06511 Rev. *A 28-lead (600-Mil) Molded DIP (51-85017) 1 0.530 0.550 28 0.070 0.090 SEATING PLANE 1.380 1.480 0.140 0.195 0.015 0.060 0.055 0.014 0.065 0.022 28-lead (300-mil) ...

Page 12

... Document #: 001-06511 Rev. *A © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...

Page 13

Document History Page Document Title: CY62256N 256K (32K x 8) Static RAM Document Number: 001- 06511 Issue Orig. of REV. ECN NO. Date Change ** 426504 See ECN NXR *A 488954 See ECN NXR Document #: 001-06511 Rev. *A Description ...

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