CY62136FV30LL-45ZSXI Cypress Semiconductor Corp, CY62136FV30LL-45ZSXI Datasheet
CY62136FV30LL-45ZSXI
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CY62136FV30LL-45ZSXI Summary of contents
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... Cypress Semiconductor Corporation Document Number: 001-08402 Rev Mbit (128K x 16) Static RAM advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL applications such as cellular telephones. The device also has an automatic power down feature that significantly reduces power consumption by 90 percent when addresses are not toggling ...
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Contents Product Portfolio ................................................................ 3 Pin Configuration ............................................................... 3 Maximum Ratings ............................................................... 4 Operating Range ................................................................. 4 Electrical Characteristics ................................................... 4 Capacitance ........................................................................ 4 Thermal Resistance . .......................................................... 5 Data Retention Characteristics ......................................... 6 Switching Characteristics .................................................. 7 Switching Waveforms ...
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... Product Portfolio Product Range CY62136FV30LL Industrial/Auto-A Auto-E Pin Configuration Figure 1. 48-Ball VFBGA Pinout BLE I/O BHE I/O I I/O I I/O I Notes 1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured pins are not connected on the die. ...
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... Tested initially and after any design or process changes that may affect these parameters Document Number: 001-08402 Rev. *I Output current into outputs (LOW) ............................. 20 mA Static discharge voltage ......................................... > 2001 V (MIL-STD-883, Method 3015) Latch up current .................................................... > 200 mA Operating Range Device + 0.3 V) CY62136FV30LL Industrial/ CC(max) + 0.3 V) CC(max) + 0.3 V) CC(max) -45 (Industrial/Auto-A) Test Conditions Min < ...
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Thermal Resistance . [10] Parameter Description Thermal resistance JA (Junction to ambient) Thermal resistance JC (Junction to case OUTPUT INCLUDING JIG AND SCOPE Parameters 2 ...
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... BHE.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling chip enable signals or by disabling both BHE and BLE. Document Number: 001-08402 Rev. *I Conditions > 0.2 V, Industrial/Auto > 0 < 0.2 V CY62136FV30LL-45 CY62136FV30LL-55 Figure 4. Data Retention Waveform DATA RETENTION MODE V CC(min) V > 1. CDR / I SB1 SB2 > 100 s or stable at V > 100 CC(min) ...
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... HZCE HZBE HZWE 20. The internal write time of the memory is defined by the overlap of WE can terminate a write by going INACTIVE. The data input setup and hold timing are referenced to the edge of the signal that terminates the write. Document Number: 001-08402 Rev. *I -45 (Industrial/Auto-A) ...
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Switching Waveforms Figure 5. Read Cycle No.1: Address Transition Controlled. ADDRESS PREVIOUS DATA VALID DATA OUT Figure 6. Read Cycle No Controlled ADDRESS CE t ACE OE t LZOE BHE/BLE t LZBE HIGH IMPEDANCE DATA OUT t LZCE ...
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... DATA I/O NOTE 27 t HZOE Notes 24. The internal write time of the memory is defined by the overlap of WE signals terminate a write by going INACTIVE. The data input setup and hold timing are referenced to the edge of the signal that terminates the write. 25. Data I/O is high impedance ...
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Switching Waveforms (continued) Figure 9. Write Cycle 3: WE controlled, OE LOW ADDRESS CE BHE/BLE DATA I/O NOTE 29 Figure 10. Write Cycle 4: BHE/BLE Controlled, OE LOW ADDRESS CE BHE/BLE NOTE 29 DATA ...
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Truth Table BHE BLE [30] [30 High High Data out (I Data out (I/O I/O ...
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... Ordering Information Speed Ordering Code (ns) 45 CY62136FV30LL-45BVXI CY62136FV30LL-45ZSXI CY62136FV30LL-45ZSXA 55 CY62136FV30LL-55ZSXE Contact your local Cypress sales representative for availability of these parts. Ordering Code Definition CY 621 3 6F V30 Document Number: 001-08402 Rev. *I Package Package Type Diagram 51-85150 48-Ball VFBGA (Pb-Free) 51-85087 44-Pin TSOP II (Pb-Free) ...
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Package Diagrams Figure 11. 48-Ball VFBGA ( mm), 51-85150 Document Number: 001-08402 Rev. *I ® CY62136FV30 MoBL 51-85150 *F Page [+] Feedback ...
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... DIMENSION IN MM (INCH) MAX MIN. Acronyms Acronym Description CMOS complementary metal oxide semiconductor I/O input/output SRAM static random access memory VFBGA very fine ball gird array TSOP thin small outline package Document Number: 001-08402 Rev. *I Figure 12. 44-Pin TSOP II, 51-85087 PIN 1 I. BASE PLANE 0.10 (.004) 0° ...
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Document History Page Document Title: CY62136FV30 MoBL Document Number: 001-08402 Submission Orig. of Rev. ECN No. Date Change ** 467351 See ECN NXR *A 797956 See ECN VKN *B 869500 See ECN VKN *C 901800 See ECN VKN *D 1371124 ...
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... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...