MAX6746KA46+T Maxim Integrated, MAX6746KA46+T Datasheet - Page 19

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MAX6746KA46+T

Manufacturer Part Number
MAX6746KA46+T
Description
Supervisory Circuits
Manufacturer
Maxim Integrated
Series
MAX6746, MAX6747, MAX6748, MAX6749, MAX6750, MAX6751, MAX6752, MAX6753r
Datasheet

Specifications of MAX6746KA46+T

Number Of Voltages Monitored
1
Monitored Voltage
1.575 V to 5 V
Undervoltage Threshold
4.533 V
Overvoltage Threshold
4.718 V
Output Type
Active Low, Push-Pull
Manual Reset
Resettable
Watchdog
Watchdog
Battery Backup Switching
No Backup
Power-up Reset Delay (typ)
9.487 ms
Supply Voltage - Max
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-23
Chip Enable Signals
No
Maximum Power Dissipation
714 mW
Minimum Operating Temperature
- 40 C
Power Fail Detection
No
Supply Current (typ)
5 uA
Supply Voltage - Min
1 V
The MAX5984 also contains an internal square wave,
PWM signal generator. The PWM runs at a typical fre-
quency of 25kHz with an approximate typical duty cycle
of 6.25%. PWMEN is used to enable or disable the PWM.
PWMEN is internally pulled up to the digital supply, and
can be left unconnected to enable the internal PWM.
When enabled, the LED pulses are driven by the PWM
to reduce the power dissipation and increase the system
efficiency. Force PWMEN low to disable the internal
PWM; the LED is then driven directly.
If the MAX5984 die temperature reaches +150NC, an
overtemperature fault is generated and the device shuts
down. The die temperature must cool down below 130NC
to remove the overtemperature fault condition. After a
thermal shutdown condition clears, the device is reset.
Careful PCB layout is critical to achieve high efficiency
and low EMI. Follow these layout guidelines for optimal
performance.
Figure 6. Typical Operating Circuit 1 (DC Load Removal Detection, Internal PWM Enabled for LED Indication, and Class 5
Detection Enabled)
Single-Port, 40W, IEEE 802.3af/802.3at PSE
Applications Information
______________________________________________________________________________________
-54V
47µF
100V
Controller with Integrated MOSFET
Thermal Shutdown
Layout Procedure
1N4448
0.1µF
100V
LED
10mH
5.1kI
1nF
LED
EN
V
V
LEGACY
MIDSPAN
OSC
EE
EE_DIG
MAX5984C
AGND
1) Place the input bypass capacitance and the output
2) Use large SMT component pads for power dissipat-
3) Use short, wide traces whenever possible for high-
4) Use the MAX5971 Evaluation Kit as a design and
5) The exposed pad (EP) must be soldered evenly to the
PWMEN
bypass capacitor (0.1µF ceramic capacitor from
AGND to OUTP) as close as possible to the MAX5984.
ing devices such as the MAX5984 and the external
diodes in the high-power path.
power paths.
layout reference.
PCB ground plane for proper operation and power
dissipation. Use multiple vias beneath the exposed
pad for maximum heat dissipation. A 1.0mm to
1.2mm pitch is the recommended spacing for these
vias and they should be plated (1oz copper) with a
small barrel diameter (0.30mm to 0.33mm).
OUTP
SMJ58A
ILIM1
ILIM2
OUT
DET
1kI
1kI
1N4448
0.1µF
100V
2.2MI
-54V
PSE OUTPUT
19

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