M24128-BRMN6TP STMicroelectronics, M24128-BRMN6TP Datasheet - Page 6
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M24128-BRMN6TP
Manufacturer Part Number
M24128-BRMN6TP
Description
IC EEPROM 128KBIT 400KHZ 8SOIC
Manufacturer
STMicroelectronics
Specifications of M24128-BRMN6TP
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
128K (16K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Organization
16 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
0.8 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8619-2
M24128-BRMN6TP
M24128-BRMN6TP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M24128-BRMN6TP
Manufacturer:
ST
Quantity:
20 000
Description
1
6/39
Description
The M24128-BW, M24128-BR and M24128-BF devices are I
erasable programmable memories (EEPROM). They are organized as 16384 × 8 bits.
Figure 1.
I
devices carry a built-in 4-bit device type identifier code (1010) in accordance with the I
bus definition.
The device behaves as a slave in the I
by the serial clock. Read and Write operations are initiated by a Start condition, generated
by the bus master. The Start condition is followed by a device select code and Read/Write
bit (RW) (as described in
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
2
C uses a two-wire serial interface, comprising a bidirectional data line and a clock line. The
Logic diagram
Table
Doc ID 16892 Rev 19
2), terminated by an acknowledge bit.
2
C protocol, with all memory operations synchronized
M24128-BW, M24128-BR, M24128-BF
2
C-compatible electrically
th
2
bit
C