BR24L64-W Rohm Semiconductor, BR24L64-W Datasheet - Page 14
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BR24L64-W
Manufacturer Part Number
BR24L64-W
Description
IC EEPROM 64KBIT 400KHZ 8DIP
Manufacturer
Rohm Semiconductor
Datasheet
1.BR24L08F-WE2.pdf
(33 pages)
Specifications of BR24L64-W
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
BR24L64-W
Manufacturer:
NXP
Quantity:
2 500
Part Number:
BR24L64-W
Manufacturer:
ROHM/罗姆
Quantity:
20 000
●Cautions on microcontroller connection
○Rs
○Maximum value of Rs
○Minimum value of Rs
In I
state to SDA port, insert a series resistance Rs between the pull up resistance Rpu and the SDA terminal of EEPROM. This
is controls over current that occurs when PMOS of the microcontroller and NMOS of EEPROM are turned ON simultaneously.
Rs also plays the role of protection of SDA terminal against surge. Therefore, even when SDA port is open drain input/output,
Rs can be used.
The maximum value of Rs is determined by the following relations.
The minimum value of Rs is determined by over current at bus collision. When over current flows, noises in power source
line, and instantaneous power failure of power source may occur. When allowable over current is defined as I, the following
relation must be satisfied. Determine the allowable current in consideration of impedance of power source line in set and so
forth. Set the over current to EEPROM 10mA or below.
(1)SDA rise time to be determined by the capacity (CBUS) of bus line of Rpu and SDA should be tR or below.
(2)The bus electric potential A to be determined by Rpu and Rs the moment when EEPROM outputs 'L' to SDA bus should
2
And AC timing should be satisfied even when SDA rise time is late.
sufficiently secure the input 'L' level (V
C BUS, it is recommended that SDA port is of open drain input/output. However, when to use CMOS input / output of tri
V
Fig.53 I/O circuit diagram
IL
Microcontroller
Microcontroller
'H' output
*4
Microcontroller
Fig.55 I/O circuit diagram
Fig.56 I/O circuit diagram
R
V
CC
PU
Bus line
capacity CBUS
R
R
Over currentⅠ
PU
S
R
I
OL
S
R
EEPROM
A
PU
R
S
EEPROM
EEPROM
IL
'L' output
V
) of microcontroller including recommended noise margin 0.1Vcc.
OL
Example)
14/32
from(2),
'H' output of microcontroller
SDA
SCL
When V
(V
∴
CC
∴
R
R
R
-V
PU
S
S
Example)When V
V
R
R
CC
+R
OL
CC
S
S
≦
≦
≦
=3V, V
)×R
S
≦
≧
0.3×3-0.4-0.1×3
1.67[kΩ]
Fig.54 Input / output collision timing
V
S
IL
1.1×3-0.3×3
V
Over current flows to SDA line by 'H'
output of microcontroller and 'L'
output of EEPROM.
-V
1.1V
R
CC
I
I
IL
S
+ V
=0.3V
OL
CC
≧
≧
-0.1V
OL
-V
CC
CC,
+0.1V
'L' output of EEPROM
300[Ω]
10×10
=3V, I=10mA
ACK
IL
V
CC
3
OL
CC
-3
=0.4V, R
≦V
×
×
IL
R
20×10
PU
PU
=20kΩ,
3