MAX16047ATN+T Maxim Integrated, MAX16047ATN+T Datasheet - Page 28
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MAX16047ATN+T
Manufacturer Part Number
MAX16047ATN+T
Description
Supervisory Circuits 12Ch EEPROM Prob System Manager
Manufacturer
Maxim Integrated
Series
MAX16047, MAX16049r
Datasheet
1.MAX16047ATNT.pdf
(61 pages)
Specifications of MAX16047ATN+T
Rohs
yes
After any MON_ inputs assigned to Slot 12 exceed their
undervoltage thresholds, the reset timeout begins. When
the reset timeout completes, RESET deasserts. The reset
timeout period is set in r19h[6:4]. See Table 21.
Power-down starts when EN is pulled low or the
Software Enable bit is set to ‘1.’ RESET asserts as soon
as power-down begins regardless of the reset output
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 9. MON_ and EN_OUT_ Slot Assignment Registers
* MAX16047 only
28
REGISTER/
ADDRESS
______________________________________________________________________________________
EEPROM
5Ah
5Bh
5Eh
56h
57h
58h
59h
5Fh
60h
61h
62h
63h
BIT RANGE
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
[3:0]
[7:4]
RESET Deassertion
MON1 Slot Assignment Register
MON2 Slot Assignment Register
MON3 Slot Assignment Register
MON4 Slot Assignment Register
MON5 Slot Assignment Register
MON6 Slot Assignment Register
MON7 Slot Assignment Register
MON8 Slot Assignment Register
MON9 Slot Assignment Register*
MON10 Slot Assignment Register*
MON11 Slot Assignment Register*
MON12 Slot Assignment Register*
EN_OUT1 Slot Assignment Register
EN_OUT2 Slot Assignment Register
EN_OUT3 Slot Assignment Register
EN_OUT4 Slot Assignment Register
EN_OUT5 Slot Assignment Register
EN_OUT6 Slot Assignment Register
EN_OUT7 Slot Assignment Register
EN_OUT8 Slot Assignment Register
EN_OUT9 Slot Assignment Register*
EN_OUT10 Slot Assignment Register*
EN_OUT11 Slot Assignment Register*
EN_OUT12 Slot Assignment Register *
Power-Down
dependencies. Power down EN_OUT_s simultaneously
or in reverse sequence mode by setting the Reverse
Sequence bit (r54h[4]) appropriately. In reverse
sequence mode (r54h[4] set to ‘1’), the EN_OUT_s
assigned to Slot 11 deassert, the MAX16047/MAX16049
wait for the Slot 11 sequence delay and then proceed
to Slot 10, and so on until the EN_OUT_s assigned to
Slot 0 turn off. When simultaneous power-down is
selected (r54h[4] set to ‘0’), all EN_OUT_s turn off at the
same time.
DESCRIPTION