BR24L08F-WE2 Rohm Semiconductor, BR24L08F-WE2 Datasheet - Page 24
![IC EEPROM 8KBIT 400KHZ 8SOP](/photos/7/22/72210/br24l08f-we2_sml.jpg)
BR24L08F-WE2
Manufacturer Part Number
BR24L08F-WE2
Description
IC EEPROM 8KBIT 400KHZ 8SOP
Manufacturer
Rohm Semiconductor
Datasheet
1.BR24L08F-WE2.pdf
(33 pages)
Specifications of BR24L08F-WE2
Memory Size
8K (1K x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOP
Clock Frequency
400kHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Memory Configuration
1K X 8
Interface Type
I2C, Serial
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
BR24L08F-WE2
BR24L08F-WE2TR
BR24L08F-WE2TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BR24L08F-WE2
Manufacturer:
ROHM/罗姆
Quantity:
20 000
○Notes on write cycle continuous input
○Notes on page write cycle
○Write protect (WP) terminal
・Write protect (WP) function
S D A
L IN E
When WP terminal is set Vcc (H level), data rewrite of all address is prohibited. When it is set GND (L level), data rewrite of all
At extremely low voltage at power ON/OFF, by setting the WP terminal 'H', mistake write can be prevented.
During tWR, set the WP terminal always to 'L'. If it is set 'H', write is forcibly terminated.
address is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L level. Do not use it open.
SDA
LINE
S
T
A
R
T
List of numbers of page write
1 0
Number of pages
Product number
A D D R E S S
1
S L A V E
In the case of BR24S256-W, 1 page = 64bytes, but the page write cycle write time is
5ms at maximum for 64byte bulk write.
It does not stand 5ms at maximum × 64byte = 320ms(Max.).
The above numbers are maximum bytes for respective types. Any bytes
below these can be written.
S
T
A
R
T
0
A 2
1 0
A 1
ADDRESS
A 0
SLAVE
1
W
W
R
E
R
T
I
/
0
A
C
K
P2
*
W A
14
A D D R E S S (n )
P1
1 st W O R D
W A
13
P0
*1
W A
12
W
R
/
BR24S16-W
W A
11
W
R
T
E
I
C
A
K
16Byte
Fig.39
WA
7
Fig.38
ADDRESS(n)
A
C
K
WORD
A D D R E S S (n )
2 n d W O R D
Page write cycle(BR24S32/64/128/256-W)
Page write cycle(BR24S16-W)
BR24S32-W
BR24S64-W
WA
0
32Byte
W A
0
C
A
K
A
C
K
D7
D 7
D A T A (n )
DATA(n)
BR24S128-W
BR24S256-W
D 0
64Byte
D0
A
C
K
A
C
K
24/32
D A TA (n+ 31 )
DATA(n+15)
*2
D 0
A
C
K
0Eh
O
For example, when it is started from address 0Eh,
therefore, increment is made as below,
0Eh→0Fh→00h→01h・・・, which please note.
* 0Eh・・・16 in hexadecimal, therefore, 00001110 becomes a binary
S
T
P
tW R (ma ximu m : 5 m s)
C o m m an d is n ot a ccep te d for
th is period .
D0
A t S TO P (stop bit)
w rite starts.
number.
WA7 ----- WA4 WA3
C
A
K
0
0
0
0
0
0
S
T
O
P
S
A
R
T
T
1 0 1 0
N e xt co m m a n d
○ Internal address increment
At STOP (stop bit)
write starts.
Page write mode (in the case of BR24S16-W)
-----
-----
-----
-----
-----
-----
Significant bit is fixed.
No digit up
tWR(maximum:5ms)
Command is not accepted for this
period.
*1 As for WA12, BR24S32-W becomes Don't care.
*2 As for BR24S128/256-W becomes (n+63).
S
T
A
R
T
Next command
1
0
0
0
0
0
0
As for WA13, BR24S32/64-W becomes Don't care.
As for WA14, BR24S32/64/128-W becomes Don't care.
0
1
0
0
0
0
1
1
0
WA2 WA1 WA0
0
0
0
1
1
0
0
0
1
1
1
0
0
1
0
0
1
0
Increment